+#define ICE_HASH_GTPU_CTX_EH_IP 0
+#define ICE_HASH_GTPU_CTX_EH_IP_UDP 1
+#define ICE_HASH_GTPU_CTX_EH_IP_TCP 2
+#define ICE_HASH_GTPU_CTX_UP_IP 3
+#define ICE_HASH_GTPU_CTX_UP_IP_UDP 4
+#define ICE_HASH_GTPU_CTX_UP_IP_TCP 5
+#define ICE_HASH_GTPU_CTX_DW_IP 6
+#define ICE_HASH_GTPU_CTX_DW_IP_UDP 7
+#define ICE_HASH_GTPU_CTX_DW_IP_TCP 8
+#define ICE_HASH_GTPU_CTX_MAX 9
+
+struct ice_hash_gtpu_ctx {
+ struct ice_rss_hash_cfg ctx[ICE_HASH_GTPU_CTX_MAX];
+};
+
+struct ice_hash_ctx {
+ struct ice_hash_gtpu_ctx gtpu4;
+ struct ice_hash_gtpu_ctx gtpu6;
+};
+
+struct ice_acl_conf {
+ struct ice_fdir_fltr input;
+ uint64_t input_set;
+};
+
+/**
+ * A structure used to define fields of ACL related info.
+ */
+struct ice_acl_info {
+ struct ice_acl_conf conf;
+ struct rte_bitmap *slots;
+ uint64_t hw_entry_id[MAX_ACL_ENTRIES];
+};
+