+ for (i = 0; i < lif->ntxqcqs; i++) {
+ struct ionic_qcq *txq = lif->txqcqs[i];
+ if (txq->flags & IONIC_QCQ_F_INITED)
+ (void)ionic_dev_tx_queue_stop(lif->eth_dev, i);
+ }
+}
+
+void
+ionic_lif_reset(struct ionic_lif *lif)
+{
+ struct ionic_dev *idev = &lif->adapter->idev;
+ int err;
+
+ IONIC_PRINT_CALL();
+
+ ionic_dev_cmd_lif_reset(idev);
+ err = ionic_dev_cmd_wait_check(idev, IONIC_DEVCMD_TIMEOUT);
+ if (err)
+ IONIC_PRINT(WARNING, "Failed to reset %s", lif->name);
+}
+
+static void
+ionic_lif_get_abs_stats(const struct ionic_lif *lif, struct rte_eth_stats *stats)
+{
+ struct ionic_lif_stats *ls = &lif->info->stats;
+ uint32_t i;
+ uint32_t num_rx_q_counters = RTE_MIN(lif->nrxqcqs, (uint32_t)
+ RTE_ETHDEV_QUEUE_STAT_CNTRS);
+ uint32_t num_tx_q_counters = RTE_MIN(lif->ntxqcqs, (uint32_t)
+ RTE_ETHDEV_QUEUE_STAT_CNTRS);
+
+ memset(stats, 0, sizeof(*stats));
+
+ if (ls == NULL) {
+ IONIC_PRINT(DEBUG, "Stats on port %u not yet initialized",
+ lif->port_id);
+ return;
+ }
+
+ /* RX */
+
+ stats->ipackets = ls->rx_ucast_packets +
+ ls->rx_mcast_packets +
+ ls->rx_bcast_packets;
+
+ stats->ibytes = ls->rx_ucast_bytes +
+ ls->rx_mcast_bytes +
+ ls->rx_bcast_bytes;
+
+ for (i = 0; i < lif->nrxqcqs; i++) {
+ struct ionic_rx_stats *rx_stats = &lif->rxqcqs[i]->stats.rx;
+ stats->imissed +=
+ rx_stats->no_cb_arg +
+ rx_stats->bad_cq_status +
+ rx_stats->no_room +
+ rx_stats->bad_len;
+ }
+
+ stats->imissed +=
+ ls->rx_ucast_drop_packets +
+ ls->rx_mcast_drop_packets +
+ ls->rx_bcast_drop_packets;
+
+ stats->imissed +=
+ ls->rx_queue_empty +
+ ls->rx_dma_error +
+ ls->rx_queue_disabled +
+ ls->rx_desc_fetch_error +
+ ls->rx_desc_data_error;
+
+ for (i = 0; i < num_rx_q_counters; i++) {
+ struct ionic_rx_stats *rx_stats = &lif->rxqcqs[i]->stats.rx;
+ stats->q_ipackets[i] = rx_stats->packets;
+ stats->q_ibytes[i] = rx_stats->bytes;
+ stats->q_errors[i] =
+ rx_stats->no_cb_arg +
+ rx_stats->bad_cq_status +
+ rx_stats->no_room +
+ rx_stats->bad_len;
+ }
+
+ /* TX */
+
+ stats->opackets = ls->tx_ucast_packets +
+ ls->tx_mcast_packets +
+ ls->tx_bcast_packets;
+
+ stats->obytes = ls->tx_ucast_bytes +
+ ls->tx_mcast_bytes +
+ ls->tx_bcast_bytes;
+
+ for (i = 0; i < lif->ntxqcqs; i++) {
+ struct ionic_tx_stats *tx_stats = &lif->txqcqs[i]->stats.tx;
+ stats->oerrors += tx_stats->drop;
+ }
+
+ stats->oerrors +=
+ ls->tx_ucast_drop_packets +
+ ls->tx_mcast_drop_packets +
+ ls->tx_bcast_drop_packets;
+
+ stats->oerrors +=
+ ls->tx_dma_error +
+ ls->tx_queue_disabled +
+ ls->tx_desc_fetch_error +
+ ls->tx_desc_data_error;
+
+ for (i = 0; i < num_tx_q_counters; i++) {
+ struct ionic_tx_stats *tx_stats = &lif->txqcqs[i]->stats.tx;
+ stats->q_opackets[i] = tx_stats->packets;
+ stats->q_obytes[i] = tx_stats->bytes;
+ }
+}
+
+void
+ionic_lif_get_stats(const struct ionic_lif *lif,
+ struct rte_eth_stats *stats)
+{
+ ionic_lif_get_abs_stats(lif, stats);
+
+ stats->ipackets -= lif->stats_base.ipackets;
+ stats->opackets -= lif->stats_base.opackets;
+ stats->ibytes -= lif->stats_base.ibytes;
+ stats->obytes -= lif->stats_base.obytes;
+ stats->imissed -= lif->stats_base.imissed;
+ stats->ierrors -= lif->stats_base.ierrors;
+ stats->oerrors -= lif->stats_base.oerrors;
+ stats->rx_nombuf -= lif->stats_base.rx_nombuf;
+}
+
+void
+ionic_lif_reset_stats(struct ionic_lif *lif)
+{
+ uint32_t i;
+
+ for (i = 0; i < lif->nrxqcqs; i++) {
+ memset(&lif->rxqcqs[i]->stats.rx, 0,
+ sizeof(struct ionic_rx_stats));
+ memset(&lif->txqcqs[i]->stats.tx, 0,
+ sizeof(struct ionic_tx_stats));
+ }
+
+ ionic_lif_get_abs_stats(lif, &lif->stats_base);
+}
+
+void
+ionic_lif_get_hw_stats(struct ionic_lif *lif, struct ionic_lif_stats *stats)
+{
+ uint16_t i, count = sizeof(struct ionic_lif_stats) / sizeof(uint64_t);
+ uint64_t *stats64 = (uint64_t *)stats;
+ uint64_t *lif_stats64 = (uint64_t *)&lif->info->stats;
+ uint64_t *lif_stats64_base = (uint64_t *)&lif->lif_stats_base;
+
+ for (i = 0; i < count; i++)
+ stats64[i] = lif_stats64[i] - lif_stats64_base[i];
+}
+
+void
+ionic_lif_reset_hw_stats(struct ionic_lif *lif)
+{
+ uint16_t i, count = sizeof(struct ionic_lif_stats) / sizeof(uint64_t);
+ uint64_t *lif_stats64 = (uint64_t *)&lif->info->stats;
+ uint64_t *lif_stats64_base = (uint64_t *)&lif->lif_stats_base;
+
+ for (i = 0; i < count; i++)
+ lif_stats64_base[i] = lif_stats64[i];
+}
+
+static int
+ionic_lif_addr_add(struct ionic_lif *lif, const uint8_t *addr)
+{
+ struct ionic_admin_ctx ctx = {
+ .pending_work = true,
+ .cmd.rx_filter_add = {
+ .opcode = IONIC_CMD_RX_FILTER_ADD,
+ .match = rte_cpu_to_le_16(IONIC_RX_FILTER_MATCH_MAC),
+ },
+ };
+ int err;
+
+ memcpy(ctx.cmd.rx_filter_add.mac.addr, addr, RTE_ETHER_ADDR_LEN);
+
+ err = ionic_adminq_post_wait(lif, &ctx);
+ if (err)
+ return err;
+
+ IONIC_PRINT(INFO, "rx_filter add (id %d)",
+ rte_le_to_cpu_32(ctx.comp.rx_filter_add.filter_id));
+
+ return ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, &ctx);
+}
+
+static int
+ionic_lif_addr_del(struct ionic_lif *lif, const uint8_t *addr)
+{
+ struct ionic_admin_ctx ctx = {
+ .pending_work = true,
+ .cmd.rx_filter_del = {
+ .opcode = IONIC_CMD_RX_FILTER_DEL,
+ },
+ };
+ struct ionic_rx_filter *f;
+ int err;
+
+ IONIC_PRINT_CALL();
+
+ rte_spinlock_lock(&lif->rx_filters.lock);
+
+ f = ionic_rx_filter_by_addr(lif, addr);
+ if (!f) {
+ rte_spinlock_unlock(&lif->rx_filters.lock);
+ return -ENOENT;
+ }
+
+ ctx.cmd.rx_filter_del.filter_id = rte_cpu_to_le_32(f->filter_id);
+ ionic_rx_filter_free(f);
+
+ rte_spinlock_unlock(&lif->rx_filters.lock);
+
+ err = ionic_adminq_post_wait(lif, &ctx);
+ if (err)
+ return err;
+
+ IONIC_PRINT(INFO, "rx_filter del (id %d)",
+ rte_le_to_cpu_32(ctx.cmd.rx_filter_del.filter_id));
+
+ return 0;
+}
+
+int
+ionic_dev_add_mac(struct rte_eth_dev *eth_dev,
+ struct rte_ether_addr *mac_addr,
+ uint32_t index __rte_unused, uint32_t pool __rte_unused)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+
+ IONIC_PRINT_CALL();
+
+ return ionic_lif_addr_add(lif, (const uint8_t *)mac_addr);
+}
+
+void
+ionic_dev_remove_mac(struct rte_eth_dev *eth_dev, uint32_t index)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+ struct ionic_adapter *adapter = lif->adapter;
+ struct rte_ether_addr *mac_addr;
+
+ IONIC_PRINT_CALL();
+
+ if (index >= adapter->max_mac_addrs) {
+ IONIC_PRINT(WARNING,
+ "Index %u is above MAC filter limit %u",
+ index, adapter->max_mac_addrs);
+ return;
+ }
+
+ mac_addr = ð_dev->data->mac_addrs[index];
+
+ if (!rte_is_valid_assigned_ether_addr(mac_addr))
+ return;
+
+ ionic_lif_addr_del(lif, (const uint8_t *)mac_addr);
+}
+
+int
+ionic_dev_set_mac(struct rte_eth_dev *eth_dev, struct rte_ether_addr *mac_addr)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+
+ IONIC_PRINT_CALL();
+
+ if (mac_addr == NULL) {
+ IONIC_PRINT(NOTICE, "New mac is null");
+ return -1;
+ }
+
+ if (!rte_is_zero_ether_addr((struct rte_ether_addr *)lif->mac_addr)) {
+ IONIC_PRINT(INFO, "Deleting mac addr %pM",
+ lif->mac_addr);
+ ionic_lif_addr_del(lif, lif->mac_addr);
+ memset(lif->mac_addr, 0, RTE_ETHER_ADDR_LEN);
+ }
+
+ IONIC_PRINT(INFO, "Updating mac addr");
+
+ rte_ether_addr_copy(mac_addr, (struct rte_ether_addr *)lif->mac_addr);
+
+ return ionic_lif_addr_add(lif, (const uint8_t *)mac_addr);
+}
+
+static int
+ionic_vlan_rx_add_vid(struct ionic_lif *lif, uint16_t vid)
+{
+ struct ionic_admin_ctx ctx = {
+ .pending_work = true,
+ .cmd.rx_filter_add = {
+ .opcode = IONIC_CMD_RX_FILTER_ADD,
+ .match = rte_cpu_to_le_16(IONIC_RX_FILTER_MATCH_VLAN),
+ .vlan.vlan = rte_cpu_to_le_16(vid),
+ },
+ };
+ int err;
+
+ err = ionic_adminq_post_wait(lif, &ctx);
+ if (err)
+ return err;
+
+ IONIC_PRINT(INFO, "rx_filter add VLAN %d (id %d)", vid,
+ rte_le_to_cpu_32(ctx.comp.rx_filter_add.filter_id));
+
+ return ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, &ctx);
+}
+
+static int
+ionic_vlan_rx_kill_vid(struct ionic_lif *lif, uint16_t vid)
+{
+ struct ionic_admin_ctx ctx = {
+ .pending_work = true,
+ .cmd.rx_filter_del = {
+ .opcode = IONIC_CMD_RX_FILTER_DEL,
+ },
+ };
+ struct ionic_rx_filter *f;
+ int err;
+
+ IONIC_PRINT_CALL();
+
+ rte_spinlock_lock(&lif->rx_filters.lock);
+
+ f = ionic_rx_filter_by_vlan(lif, vid);
+ if (!f) {
+ rte_spinlock_unlock(&lif->rx_filters.lock);
+ return -ENOENT;
+ }
+
+ ctx.cmd.rx_filter_del.filter_id = rte_cpu_to_le_32(f->filter_id);
+ ionic_rx_filter_free(f);
+ rte_spinlock_unlock(&lif->rx_filters.lock);
+
+ err = ionic_adminq_post_wait(lif, &ctx);
+ if (err)
+ return err;
+
+ IONIC_PRINT(INFO, "rx_filter del VLAN %d (id %d)", vid,
+ rte_le_to_cpu_32(ctx.cmd.rx_filter_del.filter_id));
+
+ return 0;
+}
+
+int
+ionic_dev_vlan_filter_set(struct rte_eth_dev *eth_dev, uint16_t vlan_id,
+ int on)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+ int err;
+
+ if (on)
+ err = ionic_vlan_rx_add_vid(lif, vlan_id);
+ else
+ err = ionic_vlan_rx_kill_vid(lif, vlan_id);
+
+ return err;
+}
+
+static void
+ionic_lif_rx_mode(struct ionic_lif *lif, uint32_t rx_mode)
+{
+ struct ionic_admin_ctx ctx = {
+ .pending_work = true,
+ .cmd.rx_mode_set = {
+ .opcode = IONIC_CMD_RX_MODE_SET,
+ .rx_mode = rte_cpu_to_le_16(rx_mode),
+ },
+ };
+ int err;
+
+ if (rx_mode & IONIC_RX_MODE_F_UNICAST)
+ IONIC_PRINT(DEBUG, "rx_mode IONIC_RX_MODE_F_UNICAST");
+ if (rx_mode & IONIC_RX_MODE_F_MULTICAST)
+ IONIC_PRINT(DEBUG, "rx_mode IONIC_RX_MODE_F_MULTICAST");
+ if (rx_mode & IONIC_RX_MODE_F_BROADCAST)
+ IONIC_PRINT(DEBUG, "rx_mode IONIC_RX_MODE_F_BROADCAST");
+ if (rx_mode & IONIC_RX_MODE_F_PROMISC)
+ IONIC_PRINT(DEBUG, "rx_mode IONIC_RX_MODE_F_PROMISC");
+ if (rx_mode & IONIC_RX_MODE_F_ALLMULTI)
+ IONIC_PRINT(DEBUG, "rx_mode IONIC_RX_MODE_F_ALLMULTI");
+
+ err = ionic_adminq_post_wait(lif, &ctx);
+ if (err)
+ IONIC_PRINT(ERR, "Failure setting RX mode");
+}
+
+static void
+ionic_set_rx_mode(struct ionic_lif *lif, uint32_t rx_mode)
+{
+ if (lif->rx_mode != rx_mode) {
+ lif->rx_mode = rx_mode;
+ ionic_lif_rx_mode(lif, rx_mode);
+ }
+}
+
+int
+ionic_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+ uint32_t rx_mode = lif->rx_mode;
+
+ IONIC_PRINT_CALL();
+
+ rx_mode |= IONIC_RX_MODE_F_PROMISC;
+
+ ionic_set_rx_mode(lif, rx_mode);
+
+ return 0;
+}
+
+int
+ionic_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+ uint32_t rx_mode = lif->rx_mode;
+
+ rx_mode &= ~IONIC_RX_MODE_F_PROMISC;
+
+ ionic_set_rx_mode(lif, rx_mode);
+
+ return 0;
+}
+
+int
+ionic_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+ uint32_t rx_mode = lif->rx_mode;
+
+ rx_mode |= IONIC_RX_MODE_F_ALLMULTI;
+
+ ionic_set_rx_mode(lif, rx_mode);
+
+ return 0;
+}
+
+int
+ionic_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)
+{
+ struct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(eth_dev);
+ uint32_t rx_mode = lif->rx_mode;
+
+ rx_mode &= ~IONIC_RX_MODE_F_ALLMULTI;
+
+ ionic_set_rx_mode(lif, rx_mode);
+
+ return 0;
+}
+
+int
+ionic_lif_change_mtu(struct ionic_lif *lif, int new_mtu)
+{
+ struct ionic_admin_ctx ctx = {
+ .pending_work = true,
+ .cmd.lif_setattr = {
+ .opcode = IONIC_CMD_LIF_SETATTR,
+ .attr = IONIC_LIF_ATTR_MTU,
+ .mtu = rte_cpu_to_le_32(new_mtu),
+ },
+ };
+ int err;
+
+ err = ionic_adminq_post_wait(lif, &ctx);
+ if (err)
+ return err;
+
+ return 0;