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net/i40e: fix request queue in VF
[dpdk.git]
/
drivers
/
net
/
ixgbe
/
ixgbe_ethdev.c
diff --git
a/drivers/net/ixgbe/ixgbe_ethdev.c
b/drivers/net/ixgbe/ixgbe_ethdev.c
index
22c5b2c
..
68b1e4f
100644
(file)
--- a/
drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/
drivers/net/ixgbe/ixgbe_ethdev.c
@@
-1869,8
+1869,7
@@
static int eth_ixgbe_pci_remove(struct rte_pci_device *pci_dev)
static struct rte_pci_driver rte_ixgbe_pmd = {
.id_table = pci_id_ixgbe_map,
static struct rte_pci_driver rte_ixgbe_pmd = {
.id_table = pci_id_ixgbe_map,
- .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |
- RTE_PCI_DRV_IOVA_AS_VA,
+ .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
.probe = eth_ixgbe_pci_probe,
.remove = eth_ixgbe_pci_remove,
};
.probe = eth_ixgbe_pci_probe,
.remove = eth_ixgbe_pci_remove,
};
@@
-1892,7
+1891,7
@@
static int eth_ixgbevf_pci_remove(struct rte_pci_device *pci_dev)
*/
static struct rte_pci_driver rte_ixgbevf_pmd = {
.id_table = pci_id_ixgbevf_map,
*/
static struct rte_pci_driver rte_ixgbevf_pmd = {
.id_table = pci_id_ixgbevf_map,
- .drv_flags = RTE_PCI_DRV_NEED_MAPPING
| RTE_PCI_DRV_IOVA_AS_VA
,
+ .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
.probe = eth_ixgbevf_pci_probe,
.remove = eth_ixgbevf_pci_remove,
};
.probe = eth_ixgbevf_pci_probe,
.remove = eth_ixgbevf_pci_remove,
};
@@
-4502,7
+4501,7
@@
ixgbe_dev_interrupt_delayed_handler(void *param)
PMD_DRV_LOG(DEBUG, "enable intr in delayed handler S[%08x]", eicr);
ixgbe_enable_intr(dev);
PMD_DRV_LOG(DEBUG, "enable intr in delayed handler S[%08x]", eicr);
ixgbe_enable_intr(dev);
- rte_intr_
enable
(intr_handle);
+ rte_intr_
ack
(intr_handle);
}
/**
}
/**
@@
-5763,7
+5762,7
@@
ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
RTE_SET_USED(queue_id);
IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask);
RTE_SET_USED(queue_id);
IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask);
- rte_intr_
enable
(intr_handle);
+ rte_intr_
ack
(intr_handle);
return 0;
}
return 0;
}
@@
-5812,7
+5811,7
@@
ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
mask &= (1 << (queue_id - 32));
IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
}
mask &= (1 << (queue_id - 32));
IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
}
- rte_intr_
enable
(intr_handle);
+ rte_intr_
ack
(intr_handle);
return 0;
}
return 0;
}