+ /* Initialize drop queue. */
+ priv->drop_queue.rxq = rxq;
+ return 0;
+error:
+ ret = rte_errno; /* Save rte_errno before cleanup. */
+ if (rxq != NULL && rxq->devx_rq.rq != NULL)
+ mlx5_devx_rq_destroy(&rxq->devx_rq);
+ if (rxq_obj != NULL) {
+ if (rxq_obj->cq_obj.cq != NULL)
+ mlx5_devx_cq_destroy(&rxq_obj->cq_obj);
+ if (rxq_obj->devx_channel)
+ mlx5_os_devx_destroy_event_channel
+ (rxq_obj->devx_channel);
+ mlx5_free(rxq_obj);
+ }
+ if (rxq_ctrl != NULL)
+ mlx5_free(rxq_ctrl);
+ if (rxq != NULL)
+ mlx5_free(rxq);
+ rte_errno = ret; /* Restore rte_errno. */
+ return -rte_errno;
+}
+
+/**
+ * Release drop Rx queue resources.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ */
+static void
+mlx5_rxq_devx_obj_drop_release(struct rte_eth_dev *dev)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_rxq_priv *rxq = priv->drop_queue.rxq;
+ struct mlx5_rxq_ctrl *rxq_ctrl = rxq->ctrl;
+
+ mlx5_rxq_devx_obj_release(rxq);
+ mlx5_free(rxq_ctrl->obj);
+ mlx5_free(rxq_ctrl);
+ mlx5_free(rxq);
+ priv->drop_queue.rxq = NULL;
+}
+
+/**
+ * Release a drop hash Rx queue.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ */
+static void
+mlx5_devx_drop_action_destroy(struct rte_eth_dev *dev)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
+
+ if (hrxq->tir != NULL)
+ mlx5_devx_tir_destroy(hrxq);
+ if (hrxq->ind_table->ind_table != NULL)
+ mlx5_devx_ind_table_destroy(hrxq->ind_table);
+ if (priv->drop_queue.rxq->devx_rq.rq != NULL)
+ mlx5_rxq_devx_obj_drop_release(dev);
+}
+
+/**
+ * Create a DevX drop action for Rx Hash queue.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+static int
+mlx5_devx_drop_action_create(struct rte_eth_dev *dev)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_hrxq *hrxq = priv->drop_queue.hrxq;
+ int ret;
+
+ ret = mlx5_rxq_devx_obj_drop_create(dev);
+ if (ret != 0) {
+ DRV_LOG(ERR, "Cannot create drop RX queue");
+ return ret;
+ }
+ /* hrxq->ind_table queues are NULL, drop RX queue ID will be used */
+ ret = mlx5_devx_ind_table_new(dev, 0, hrxq->ind_table);
+ if (ret != 0) {
+ DRV_LOG(ERR, "Cannot create drop hash RX queue indirection table");
+ goto error;
+ }
+ ret = mlx5_devx_hrxq_new(dev, hrxq, /* tunnel */ false);
+ if (ret != 0) {
+ DRV_LOG(ERR, "Cannot create drop hash RX queue");
+ goto error;
+ }
+ return 0;
+error:
+ mlx5_devx_drop_action_destroy(dev);
+ return ret;
+}
+
+/**
+ * Select TXQ TIS number.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ * @param queue_idx
+ * Queue index in DPDK Tx queue array.
+ *
+ * @return
+ * > 0 on success, a negative errno value otherwise.
+ */
+static uint32_t
+mlx5_get_txq_tis_num(struct rte_eth_dev *dev, uint16_t queue_idx)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ int tis_idx;
+
+ if (priv->sh->bond.n_port && priv->sh->lag.affinity_mode ==
+ MLX5_LAG_MODE_TIS) {
+ tis_idx = (priv->lag_affinity_idx + queue_idx) %
+ priv->sh->bond.n_port;
+ DRV_LOG(INFO, "port %d txq %d gets affinity %d and maps to PF %d.",
+ dev->data->port_id, queue_idx, tis_idx + 1,
+ priv->sh->lag.tx_remap_affinity[tis_idx]);
+ } else {
+ tis_idx = 0;
+ }
+ MLX5_ASSERT(priv->sh->tis[tis_idx]);
+ return priv->sh->tis[tis_idx]->id;
+}
+
+/**
+ * Create the Tx hairpin queue object.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ * @param idx
+ * Queue index in DPDK Tx queue array.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+static int
+mlx5_txq_obj_hairpin_new(struct rte_eth_dev *dev, uint16_t idx)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
+ struct mlx5_txq_ctrl *txq_ctrl =
+ container_of(txq_data, struct mlx5_txq_ctrl, txq);
+ struct mlx5_devx_create_sq_attr attr = { 0 };
+ struct mlx5_txq_obj *tmpl = txq_ctrl->obj;
+ uint32_t max_wq_data;
+
+ MLX5_ASSERT(txq_data);
+ MLX5_ASSERT(tmpl);
+ tmpl->txq_ctrl = txq_ctrl;
+ attr.hairpin = 1;
+ attr.tis_lst_sz = 1;
+ max_wq_data = priv->config.hca_attr.log_max_hairpin_wq_data_sz;
+ /* Jumbo frames > 9KB should be supported, and more packets. */
+ if (priv->config.log_hp_size != (uint32_t)MLX5_ARG_UNSET) {
+ if (priv->config.log_hp_size > max_wq_data) {
+ DRV_LOG(ERR, "Total data size %u power of 2 is "
+ "too large for hairpin.",
+ priv->config.log_hp_size);
+ rte_errno = ERANGE;
+ return -rte_errno;
+ }
+ attr.wq_attr.log_hairpin_data_sz = priv->config.log_hp_size;
+ } else {
+ attr.wq_attr.log_hairpin_data_sz =
+ (max_wq_data < MLX5_HAIRPIN_JUMBO_LOG_SIZE) ?
+ max_wq_data : MLX5_HAIRPIN_JUMBO_LOG_SIZE;
+ }
+ /* Set the packets number to the maximum value for performance. */
+ attr.wq_attr.log_hairpin_num_packets =
+ attr.wq_attr.log_hairpin_data_sz -
+ MLX5_HAIRPIN_QUEUE_STRIDE;
+
+ attr.tis_num = mlx5_get_txq_tis_num(dev, idx);
+ tmpl->sq = mlx5_devx_cmd_create_sq(priv->sh->cdev->ctx, &attr);
+ if (!tmpl->sq) {
+ DRV_LOG(ERR,
+ "Port %u tx hairpin queue %u can't create SQ object.",
+ dev->data->port_id, idx);
+ rte_errno = errno;
+ return -rte_errno;
+ }
+ return 0;
+}
+
+#if defined(HAVE_MLX5DV_DEVX_UAR_OFFSET) || !defined(HAVE_INFINIBAND_VERBS_H)
+/**
+ * Destroy the Tx queue DevX object.
+ *
+ * @param txq_obj
+ * Txq object to destroy.
+ */
+static void
+mlx5_txq_release_devx_resources(struct mlx5_txq_obj *txq_obj)
+{
+ mlx5_devx_sq_destroy(&txq_obj->sq_obj);
+ memset(&txq_obj->sq_obj, 0, sizeof(txq_obj->sq_obj));
+ mlx5_devx_cq_destroy(&txq_obj->cq_obj);
+ memset(&txq_obj->cq_obj, 0, sizeof(txq_obj->cq_obj));
+}
+
+/**
+ * Create a SQ object and its resources using DevX.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ * @param idx
+ * Queue index in DPDK Tx queue array.
+ * @param[in] log_desc_n
+ * Log of number of descriptors in queue.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+static int
+mlx5_txq_create_devx_sq_resources(struct rte_eth_dev *dev, uint16_t idx,
+ uint16_t log_desc_n)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_common_device *cdev = priv->sh->cdev;
+ struct mlx5_uar *uar = &priv->sh->tx_uar;
+ struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
+ struct mlx5_txq_ctrl *txq_ctrl =
+ container_of(txq_data, struct mlx5_txq_ctrl, txq);
+ struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
+ struct mlx5_devx_create_sq_attr sq_attr = {
+ .flush_in_error_en = 1,
+ .allow_multi_pkt_send_wqe = !!priv->config.mps,
+ .min_wqe_inline_mode = priv->config.hca_attr.vport_inline_mode,
+ .allow_swp = !!priv->config.swp,
+ .cqn = txq_obj->cq_obj.cq->id,
+ .tis_lst_sz = 1,
+ .wq_attr = (struct mlx5_devx_wq_attr){
+ .pd = cdev->pdn,
+ .uar_page = mlx5_os_get_devx_uar_page_id(uar->obj),
+ },
+ .ts_format =
+ mlx5_ts_format_conv(cdev->config.hca_attr.sq_ts_format),
+ .tis_num = mlx5_get_txq_tis_num(dev, idx),
+ };
+
+ /* Create Send Queue object with DevX. */
+ return mlx5_devx_sq_create(cdev->ctx, &txq_obj->sq_obj,
+ log_desc_n, &sq_attr, priv->sh->numa_node);
+}
+#endif
+
+/**
+ * Create the Tx queue DevX object.
+ *
+ * @param dev
+ * Pointer to Ethernet device.
+ * @param idx
+ * Queue index in DPDK Tx queue array.
+ *
+ * @return
+ * 0 on success, a negative errno value otherwise and rte_errno is set.
+ */
+int
+mlx5_txq_devx_obj_new(struct rte_eth_dev *dev, uint16_t idx)
+{
+ struct mlx5_priv *priv = dev->data->dev_private;
+ struct mlx5_txq_data *txq_data = (*priv->txqs)[idx];
+ struct mlx5_txq_ctrl *txq_ctrl =
+ container_of(txq_data, struct mlx5_txq_ctrl, txq);
+
+ if (txq_ctrl->type == MLX5_TXQ_TYPE_HAIRPIN)
+ return mlx5_txq_obj_hairpin_new(dev, idx);
+#if !defined(HAVE_MLX5DV_DEVX_UAR_OFFSET) && defined(HAVE_INFINIBAND_VERBS_H)
+ DRV_LOG(ERR, "Port %u Tx queue %u cannot create with DevX, no UAR.",
+ dev->data->port_id, idx);
+ rte_errno = ENOMEM;
+ return -rte_errno;
+#else
+ struct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(priv));
+ struct mlx5_dev_ctx_shared *sh = priv->sh;
+ struct mlx5_txq_obj *txq_obj = txq_ctrl->obj;
+ struct mlx5_devx_cq_attr cq_attr = {
+ .uar_page_id = mlx5_os_get_devx_uar_page_id(sh->tx_uar.obj),
+ };
+ uint32_t cqe_n, log_desc_n;
+ uint32_t wqe_n, wqe_size;
+ int ret = 0;
+
+ MLX5_ASSERT(txq_data);
+ MLX5_ASSERT(txq_obj);
+ MLX5_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
+ MLX5_ASSERT(ppriv);
+ txq_obj->txq_ctrl = txq_ctrl;
+ txq_obj->dev = dev;
+ cqe_n = (1UL << txq_data->elts_n) / MLX5_TX_COMP_THRESH +
+ 1 + MLX5_TX_COMP_THRESH_INLINE_DIV;
+ log_desc_n = log2above(cqe_n);
+ cqe_n = 1UL << log_desc_n;
+ if (cqe_n > UINT16_MAX) {
+ DRV_LOG(ERR, "Port %u Tx queue %u requests to many CQEs %u.",
+ dev->data->port_id, txq_data->idx, cqe_n);
+ rte_errno = EINVAL;
+ return 0;
+ }
+ /* Create completion queue object with DevX. */
+ ret = mlx5_devx_cq_create(sh->cdev->ctx, &txq_obj->cq_obj, log_desc_n,
+ &cq_attr, priv->sh->numa_node);
+ if (ret) {
+ DRV_LOG(ERR, "Port %u Tx queue %u CQ creation failure.",
+ dev->data->port_id, idx);
+ goto error;
+ }
+ txq_data->cqe_n = log_desc_n;
+ txq_data->cqe_s = cqe_n;
+ txq_data->cqe_m = txq_data->cqe_s - 1;
+ txq_data->cqes = txq_obj->cq_obj.cqes;
+ txq_data->cq_ci = 0;
+ txq_data->cq_pi = 0;
+ txq_data->cq_db = txq_obj->cq_obj.db_rec;
+ *txq_data->cq_db = 0;
+ /*
+ * Adjust the amount of WQEs depending on inline settings.
+ * The number of descriptors should be enough to handle
+ * the specified number of packets. If queue is being created
+ * with Verbs the rdma-core does queue size adjustment
+ * internally in the mlx5_calc_sq_size(), we do the same
+ * for the queue being created with DevX at this point.
+ */
+ wqe_size = txq_data->tso_en ?
+ RTE_ALIGN(txq_ctrl->max_tso_header, MLX5_WSEG_SIZE) : 0;
+ wqe_size += sizeof(struct mlx5_wqe_cseg) +
+ sizeof(struct mlx5_wqe_eseg) +
+ sizeof(struct mlx5_wqe_dseg);
+ if (txq_data->inlen_send)
+ wqe_size = RTE_MAX(wqe_size, sizeof(struct mlx5_wqe_cseg) +
+ sizeof(struct mlx5_wqe_eseg) +
+ RTE_ALIGN(txq_data->inlen_send +
+ sizeof(uint32_t),
+ MLX5_WSEG_SIZE));
+ wqe_size = RTE_ALIGN(wqe_size, MLX5_WQE_SIZE) / MLX5_WQE_SIZE;
+ /* Create Send Queue object with DevX. */
+ wqe_n = RTE_MIN((1UL << txq_data->elts_n) * wqe_size,
+ (uint32_t)priv->sh->device_attr.max_qp_wr);
+ log_desc_n = log2above(wqe_n);
+ ret = mlx5_txq_create_devx_sq_resources(dev, idx, log_desc_n);
+ if (ret) {
+ DRV_LOG(ERR, "Port %u Tx queue %u SQ creation failure.",
+ dev->data->port_id, idx);
+ rte_errno = errno;
+ goto error;
+ }
+ /* Create the Work Queue. */
+ txq_data->wqe_n = log_desc_n;
+ txq_data->wqe_s = 1 << txq_data->wqe_n;
+ txq_data->wqe_m = txq_data->wqe_s - 1;
+ txq_data->wqes = (struct mlx5_wqe *)(uintptr_t)txq_obj->sq_obj.wqes;
+ txq_data->wqes_end = txq_data->wqes + txq_data->wqe_s;
+ txq_data->wqe_ci = 0;
+ txq_data->wqe_pi = 0;
+ txq_data->wqe_comp = 0;
+ txq_data->wqe_thres = txq_data->wqe_s / MLX5_TX_COMP_THRESH_INLINE_DIV;
+ txq_data->qp_db = &txq_obj->sq_obj.db_rec[MLX5_SND_DBR];
+ *txq_data->qp_db = 0;
+ txq_data->qp_num_8s = txq_obj->sq_obj.sq->id << 8;
+ txq_data->db_heu = sh->cdev->config.dbnc == MLX5_TXDB_HEURISTIC;
+ txq_data->db_nc = sh->tx_uar.dbnc;
+ /* Change Send Queue state to Ready-to-Send. */
+ ret = mlx5_txq_devx_modify(txq_obj, MLX5_TXQ_MOD_RST2RDY, 0);
+ if (ret) {
+ rte_errno = errno;
+ DRV_LOG(ERR,
+ "Port %u Tx queue %u SQ state to SQC_STATE_RDY failed.",
+ dev->data->port_id, idx);
+ goto error;
+ }
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+ /*
+ * If using DevX need to query and store TIS transport domain value.
+ * This is done once per port.
+ * Will use this value on Rx, when creating matching TIR.
+ */
+ if (!priv->sh->tdn)
+ priv->sh->tdn = priv->sh->td->id;
+#endif
+ txq_ctrl->uar_mmap_offset =
+ mlx5_os_get_devx_uar_mmap_offset(sh->tx_uar.obj);
+ ppriv->uar_table[txq_data->idx] = sh->tx_uar.bf_db;
+ dev->data->tx_queue_state[idx] = RTE_ETH_QUEUE_STATE_STARTED;
+ return 0;