-/* Memory Region object. */
-struct mlx5_mr {
- LIST_ENTRY(mlx5_mr) mr; /**< Pointer to the prev/next entry. */
- struct ibv_mr *ibv_mr; /* Verbs Memory Region. */
- const struct rte_memseg_list *msl;
- int ms_base_idx; /* Start index of msl->memseg_arr[]. */
- int ms_n; /* Number of memsegs in use. */
- uint32_t ms_bmp_n; /* Number of bits in memsegs bit-mask. */
- struct rte_bitmap *ms_bmp; /* Bit-mask of memsegs belonged to MR. */
-};
-
-/* Cache entry for Memory Region. */
-struct mlx5_mr_cache {
- uintptr_t start; /* Start address of MR. */
- uintptr_t end; /* End address of MR. */
- uint32_t lkey; /* rte_cpu_to_be_32(ibv_mr->lkey). */
-} __rte_packed;
-
-/* MR Cache table for Binary search. */
-struct mlx5_mr_btree {
- uint16_t len; /* Number of entries. */
- uint16_t size; /* Total number of entries. */
- int overflow; /* Mark failure of table expansion. */
- struct mlx5_mr_cache (*table)[];
-} __rte_packed;
-
-/* Per-queue MR control descriptor. */
-struct mlx5_mr_ctrl {
- uint32_t *dev_gen_ptr; /* Generation number of device to poll. */
- uint32_t cur_gen; /* Generation number saved to flush caches. */
- uint16_t mru; /* Index of last hit entry in top-half cache. */
- uint16_t head; /* Index of the oldest entry in top-half cache. */
- struct mlx5_mr_cache cache[MLX5_MR_CACHE_N]; /* Cache for top-half. */
- struct mlx5_mr_btree cache_bh; /* Cache for bottom-half. */
-} __rte_packed;
-
-extern struct mlx5_dev_list mlx5_mem_event_cb_list;
-extern rte_rwlock_t mlx5_mem_event_rwlock;