- if (rxq_obj->type == MLX5_RXQ_OBJ_TYPE_IBV) {
- ret = mlx5_glue->get_cq_event(rxq_obj->ibv_channel, &ev_cq,
- &ev_ctx);
- if (ret || ev_cq != rxq_obj->ibv_cq) {
- rte_errno = EINVAL;
- goto exit;
- }
- mlx5_glue->ack_cq_events(rxq_obj->ibv_cq, 1);
- } else if (rxq_obj->type == MLX5_RXQ_OBJ_TYPE_DEVX_RQ) {
-#ifdef HAVE_IBV_DEVX_EVENT
- struct mlx5dv_devx_async_event_hdr *event_data = NULL;
-
- ret = mlx5_glue->devx_get_event
- (rxq_obj->devx_channel, event_data,
- sizeof(struct mlx5dv_devx_async_event_hdr));
- if (ret <= 0 || event_data->cookie !=
- (uint64_t)(uintptr_t)rxq_obj->devx_cq) {
- rte_errno = EINVAL;
- goto exit;
- }
-#endif /* HAVE_IBV_DEVX_EVENT */
- }
- rxq_data->cq_arm_sn++;
- mlx5_rxq_obj_release(rxq_obj);
- return 0;
-exit:
- ret = rte_errno; /* Save rte_errno before cleanup. */
- if (rxq_obj)
- mlx5_rxq_obj_release(rxq_obj);
- DRV_LOG(WARNING, "port %u unable to disable interrupt on Rx queue %d",
- dev->data->port_id, rx_queue_id);
- rte_errno = ret; /* Restore rte_errno. */
- return -rte_errno;
-}
-
-/**
- * Create a CQ Verbs object.
- *
- * @param dev
- * Pointer to Ethernet device.
- * @param priv
- * Pointer to device private data.
- * @param rxq_data
- * Pointer to Rx queue data.
- * @param cqe_n
- * Number of CQEs in CQ.
- * @param rxq_obj
- * Pointer to Rx queue object data.
- *
- * @return
- * The Verbs object initialised, NULL otherwise and rte_errno is set.
- */
-static struct ibv_cq *
-mlx5_ibv_cq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,
- struct mlx5_rxq_data *rxq_data,
- unsigned int cqe_n, struct mlx5_rxq_obj *rxq_obj)
-{
- struct {
- struct ibv_cq_init_attr_ex ibv;
- struct mlx5dv_cq_init_attr mlx5;
- } cq_attr;
-
- cq_attr.ibv = (struct ibv_cq_init_attr_ex){
- .cqe = cqe_n,
- .channel = rxq_obj->ibv_channel,
- .comp_mask = 0,
- };
- cq_attr.mlx5 = (struct mlx5dv_cq_init_attr){
- .comp_mask = 0,
- };
- if (priv->config.cqe_comp && !rxq_data->hw_timestamp &&
- !rxq_data->lro) {
- cq_attr.mlx5.comp_mask |=
- MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
-#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
- cq_attr.mlx5.cqe_comp_res_format =
- mlx5_rxq_mprq_enabled(rxq_data) ?
- MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
- MLX5DV_CQE_RES_FORMAT_HASH;
-#else
- cq_attr.mlx5.cqe_comp_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
-#endif
- /*
- * For vectorized Rx, it must not be doubled in order to
- * make cq_ci and rq_ci aligned.
- */
- if (mlx5_rxq_check_vec_support(rxq_data) < 0)
- cq_attr.ibv.cqe *= 2;
- } else if (priv->config.cqe_comp && rxq_data->hw_timestamp) {
- DRV_LOG(DEBUG,
- "port %u Rx CQE compression is disabled for HW"
- " timestamp",
- dev->data->port_id);
- } else if (priv->config.cqe_comp && rxq_data->lro) {
- DRV_LOG(DEBUG,
- "port %u Rx CQE compression is disabled for LRO",
- dev->data->port_id);
- }
-#ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
- if (priv->config.cqe_pad) {
- cq_attr.mlx5.comp_mask |= MLX5DV_CQ_INIT_ATTR_MASK_FLAGS;
- cq_attr.mlx5.flags |= MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
- }
-#endif
- return mlx5_glue->cq_ex_to_cq(mlx5_glue->dv_create_cq(priv->sh->ctx,
- &cq_attr.ibv,
- &cq_attr.mlx5));
-}
-
-/**
- * Create a WQ Verbs object.
- *
- * @param dev
- * Pointer to Ethernet device.
- * @param priv
- * Pointer to device private data.
- * @param rxq_data
- * Pointer to Rx queue data.
- * @param idx
- * Queue index in DPDK Rx queue array
- * @param wqe_n
- * Number of WQEs in WQ.
- * @param rxq_obj
- * Pointer to Rx queue object data.
- *
- * @return
- * The Verbs object initialised, NULL otherwise and rte_errno is set.
- */
-static struct ibv_wq *
-mlx5_ibv_wq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,
- struct mlx5_rxq_data *rxq_data, uint16_t idx,
- unsigned int wqe_n, struct mlx5_rxq_obj *rxq_obj)
-{
- struct {
- struct ibv_wq_init_attr ibv;
-#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
- struct mlx5dv_wq_init_attr mlx5;
-#endif
- } wq_attr;
-
- wq_attr.ibv = (struct ibv_wq_init_attr){
- .wq_context = NULL, /* Could be useful in the future. */
- .wq_type = IBV_WQT_RQ,
- /* Max number of outstanding WRs. */
- .max_wr = wqe_n >> rxq_data->sges_n,
- /* Max number of scatter/gather elements in a WR. */
- .max_sge = 1 << rxq_data->sges_n,
- .pd = priv->sh->pd,
- .cq = rxq_obj->ibv_cq,
- .comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0,
- .create_flags = (rxq_data->vlan_strip ?
- IBV_WQ_FLAGS_CVLAN_STRIPPING : 0),
- };
- /* By default, FCS (CRC) is stripped by hardware. */
- if (rxq_data->crc_present) {
- wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;
- wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
- }
- if (priv->config.hw_padding) {
-#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
- wq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;
- wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
-#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
- wq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;
- wq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;
-#endif
- }
-#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
- wq_attr.mlx5 = (struct mlx5dv_wq_init_attr){
- .comp_mask = 0,
- };
- if (mlx5_rxq_mprq_enabled(rxq_data)) {
- struct mlx5dv_striding_rq_init_attr *mprq_attr =
- &wq_attr.mlx5.striding_rq_attrs;
-
- wq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;
- *mprq_attr = (struct mlx5dv_striding_rq_init_attr){
- .single_stride_log_num_of_bytes = rxq_data->strd_sz_n,
- .single_wqe_log_num_of_strides = rxq_data->strd_num_n,
- .two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,
- };
- }
- rxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,
- &wq_attr.mlx5);
-#else
- rxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);
-#endif
- if (rxq_obj->wq) {
- /*
- * Make sure number of WRs*SGEs match expectations since a queue
- * cannot allocate more than "desc" buffers.
- */
- if (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||
- wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {
- DRV_LOG(ERR,
- "port %u Rx queue %u requested %u*%u but got"
- " %u*%u WRs*SGEs",
- dev->data->port_id, idx,
- wqe_n >> rxq_data->sges_n,
- (1 << rxq_data->sges_n),
- wq_attr.ibv.max_wr, wq_attr.ibv.max_sge);
- claim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));
- rxq_obj->wq = NULL;
- rte_errno = EINVAL;
- }
- }
- return rxq_obj->wq;
-}
-
-/**
- * Fill common fields of create RQ attributes structure.
- *
- * @param rxq_data
- * Pointer to Rx queue data.
- * @param cqn
- * CQ number to use with this RQ.
- * @param rq_attr
- * RQ attributes structure to fill..
- */
-static void
-mlx5_devx_create_rq_attr_fill(struct mlx5_rxq_data *rxq_data, uint32_t cqn,
- struct mlx5_devx_create_rq_attr *rq_attr)
-{
- rq_attr->state = MLX5_RQC_STATE_RST;
- rq_attr->vsd = (rxq_data->vlan_strip) ? 0 : 1;
- rq_attr->cqn = cqn;
- rq_attr->scatter_fcs = (rxq_data->crc_present) ? 1 : 0;
-}
-
-/**
- * Fill common fields of DevX WQ attributes structure.
- *
- * @param priv
- * Pointer to device private data.
- * @param rxq_ctrl
- * Pointer to Rx queue control structure.
- * @param wq_attr
- * WQ attributes structure to fill..
- */
-static void
-mlx5_devx_wq_attr_fill(struct mlx5_priv *priv, struct mlx5_rxq_ctrl *rxq_ctrl,
- struct mlx5_devx_wq_attr *wq_attr)
-{
- wq_attr->end_padding_mode = priv->config.cqe_pad ?
- MLX5_WQ_END_PAD_MODE_ALIGN :
- MLX5_WQ_END_PAD_MODE_NONE;
- wq_attr->pd = priv->sh->pdn;
- wq_attr->dbr_addr = rxq_ctrl->rq_dbr_offset;
- wq_attr->dbr_umem_id = rxq_ctrl->rq_dbr_umem_id;
- wq_attr->dbr_umem_valid = 1;
- wq_attr->wq_umem_id = rxq_ctrl->wq_umem->umem_id;
- wq_attr->wq_umem_valid = 1;
-}
-
-/**
- * Create a RQ object using DevX.
- *
- * @param dev
- * Pointer to Ethernet device.
- * @param idx
- * Queue index in DPDK Rx queue array
- * @param cqn
- * CQ number to use with this RQ.
- *
- * @return
- * The DevX object initialised, NULL otherwise and rte_errno is set.
- */
-static struct mlx5_devx_obj *
-mlx5_devx_rq_new(struct rte_eth_dev *dev, uint16_t idx, uint32_t cqn)
-{
- struct mlx5_priv *priv = dev->data->dev_private;
- struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
- struct mlx5_rxq_ctrl *rxq_ctrl =
- container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
- struct mlx5_devx_create_rq_attr rq_attr = { 0 };
- uint32_t wqe_n = 1 << (rxq_data->elts_n - rxq_data->sges_n);
- uint32_t wq_size = 0;
- uint32_t wqe_size = 0;
- uint32_t log_wqe_size = 0;
- void *buf = NULL;
- struct mlx5_devx_obj *rq;
-
- /* Fill RQ attributes. */
- rq_attr.mem_rq_type = MLX5_RQC_MEM_RQ_TYPE_MEMORY_RQ_INLINE;
- rq_attr.flush_in_error_en = 1;
- mlx5_devx_create_rq_attr_fill(rxq_data, cqn, &rq_attr);
- /* Fill WQ attributes for this RQ. */
- if (mlx5_rxq_mprq_enabled(rxq_data)) {
- rq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC_STRIDING_RQ;
- /*
- * Number of strides in each WQE:
- * 512*2^single_wqe_log_num_of_strides.
- */
- rq_attr.wq_attr.single_wqe_log_num_of_strides =
- rxq_data->strd_num_n -
- MLX5_MIN_SINGLE_WQE_LOG_NUM_STRIDES;
- /* Stride size = (2^single_stride_log_num_of_bytes)*64B. */
- rq_attr.wq_attr.single_stride_log_num_of_bytes =
- rxq_data->strd_sz_n -
- MLX5_MIN_SINGLE_STRIDE_LOG_NUM_BYTES;
- wqe_size = sizeof(struct mlx5_wqe_mprq);
- } else {
- rq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC;
- wqe_size = sizeof(struct mlx5_wqe_data_seg);
- }
- log_wqe_size = log2above(wqe_size) + rxq_data->sges_n;
- rq_attr.wq_attr.log_wq_stride = log_wqe_size;
- rq_attr.wq_attr.log_wq_sz = rxq_data->elts_n - rxq_data->sges_n;
- /* Calculate and allocate WQ memory space. */
- wqe_size = 1 << log_wqe_size; /* round up power of two.*/
- wq_size = wqe_n * wqe_size;
- size_t alignment = MLX5_WQE_BUF_ALIGNMENT;
- if (alignment == (size_t)-1) {
- DRV_LOG(ERR, "Failed to get mem page size");
- rte_errno = ENOMEM;
- return NULL;
- }
- buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, wq_size,
- alignment, rxq_ctrl->socket);
- if (!buf)
- return NULL;
- rxq_data->wqes = buf;
- rxq_ctrl->wq_umem = mlx5_glue->devx_umem_reg(priv->sh->ctx,
- buf, wq_size, 0);
- if (!rxq_ctrl->wq_umem) {
- mlx5_free(buf);
- return NULL;
- }
- mlx5_devx_wq_attr_fill(priv, rxq_ctrl, &rq_attr.wq_attr);
- rq = mlx5_devx_cmd_create_rq(priv->sh->ctx, &rq_attr, rxq_ctrl->socket);
- if (!rq)
- rxq_release_devx_rq_resources(rxq_ctrl);
- return rq;
-}
-
-/**
- * Create a DevX CQ object for an Rx queue.
- *
- * @param dev
- * Pointer to Ethernet device.
- * @param cqe_n
- * Number of CQEs in CQ.
- * @param idx
- * Queue index in DPDK Rx queue array
- * @param rxq_obj
- * Pointer to Rx queue object data.
- *
- * @return
- * The DevX object initialised, NULL otherwise and rte_errno is set.
- */
-static struct mlx5_devx_obj *
-mlx5_devx_cq_new(struct rte_eth_dev *dev, unsigned int cqe_n, uint16_t idx,
- struct mlx5_rxq_obj *rxq_obj)
-{
- struct mlx5_devx_obj *cq_obj = 0;
- struct mlx5_devx_cq_attr cq_attr = { 0 };
- struct mlx5_priv *priv = dev->data->dev_private;
- struct mlx5_rxq_data *rxq_data = (*priv->rxqs)[idx];
- struct mlx5_rxq_ctrl *rxq_ctrl =
- container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
- size_t page_size = rte_mem_page_size();
- uint32_t lcore = (uint32_t)rte_lcore_to_cpu_id(-1);
- uint32_t eqn = 0;
- void *buf = NULL;
- uint16_t event_nums[1] = {0};
- uint32_t log_cqe_n;
- uint32_t cq_size;
- int ret = 0;
-
- if (page_size == (size_t)-1) {
- DRV_LOG(ERR, "Failed to get page_size.");
- goto error;
- }
- if (priv->config.cqe_comp && !rxq_data->hw_timestamp &&
- !rxq_data->lro) {
- cq_attr.cqe_comp_en = MLX5DV_CQ_INIT_ATTR_MASK_COMPRESSED_CQE;
-#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
- cq_attr.mini_cqe_res_format =
- mlx5_rxq_mprq_enabled(rxq_data) ?
- MLX5DV_CQE_RES_FORMAT_CSUM_STRIDX :
- MLX5DV_CQE_RES_FORMAT_HASH;
-#else
- cq_attr.mini_cqe_res_format = MLX5DV_CQE_RES_FORMAT_HASH;
-#endif
- /*
- * For vectorized Rx, it must not be doubled in order to
- * make cq_ci and rq_ci aligned.
- */
- if (mlx5_rxq_check_vec_support(rxq_data) < 0)
- cqe_n *= 2;
- } else if (priv->config.cqe_comp && rxq_data->hw_timestamp) {
- DRV_LOG(DEBUG,
- "port %u Rx CQE compression is disabled for HW"
- " timestamp",
- dev->data->port_id);
- } else if (priv->config.cqe_comp && rxq_data->lro) {
- DRV_LOG(DEBUG,
- "port %u Rx CQE compression is disabled for LRO",
- dev->data->port_id);
- }
-#ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
- if (priv->config.cqe_pad)
- cq_attr.cqe_size = MLX5DV_CQ_INIT_ATTR_FLAGS_CQE_PAD;
-#endif
- log_cqe_n = log2above(cqe_n);
- cq_size = sizeof(struct mlx5_cqe) * (1 << log_cqe_n);
- /* Query the EQN for this core. */
- if (mlx5_glue->devx_query_eqn(priv->sh->ctx, lcore, &eqn)) {
- DRV_LOG(ERR, "Failed to query EQN for CQ.");
- goto error;
- }
- cq_attr.eqn = eqn;
- buf = rte_calloc_socket(__func__, 1, cq_size, page_size,
- rxq_ctrl->socket);
- if (!buf) {
- DRV_LOG(ERR, "Failed to allocate memory for CQ.");