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net/mlx5: optimize Rx buffer replenishment threshold
[dpdk.git]
/
drivers
/
net
/
mlx5
/
mlx5_rxtx.h
diff --git
a/drivers/net/mlx5/mlx5_rxtx.h
b/drivers/net/mlx5/mlx5_rxtx.h
index
59fb43f
..
f47d327
100644
(file)
--- a/
drivers/net/mlx5/mlx5_rxtx.h
+++ b/
drivers/net/mlx5/mlx5_rxtx.h
@@
-101,6
+101,7
@@
struct mlx5_rxq_data {
uint16_t consumed_strd; /* Number of consumed strides in WQE. */
uint32_t rq_pi;
uint32_t cq_ci;
uint16_t consumed_strd; /* Number of consumed strides in WQE. */
uint32_t rq_pi;
uint32_t cq_ci;
+ uint16_t rq_repl_thresh; /* Threshold for buffer replenishment. */
struct mlx5_mr_ctrl mr_ctrl; /* MR control descriptor. */
uint16_t mprq_max_memcpy_len; /* Maximum size of packet to memcpy. */
volatile void *wqes;
struct mlx5_mr_ctrl mr_ctrl; /* MR control descriptor. */
uint16_t mprq_max_memcpy_len; /* Maximum size of packet to memcpy. */
volatile void *wqes;
@@
-379,17
+380,16
@@
uint32_t mlx5_tx_update_ext_mp(struct mlx5_txq_data *txq, uintptr_t addr,
* Address of the lock to use for that UAR access.
*/
static __rte_always_inline void
* Address of the lock to use for that UAR access.
*/
static __rte_always_inline void
-__mlx5_uar_write64_relaxed(uint64_t val, vo
latile vo
id *addr,
+__mlx5_uar_write64_relaxed(uint64_t val, void *addr,
rte_spinlock_t *lock __rte_unused)
{
#ifdef RTE_ARCH_64
rte_spinlock_t *lock __rte_unused)
{
#ifdef RTE_ARCH_64
-
rte_write64_relaxed(val, addr)
;
+
*(uint64_t *)addr = val
;
#else /* !RTE_ARCH_64 */
rte_spinlock_lock(lock);
#else /* !RTE_ARCH_64 */
rte_spinlock_lock(lock);
-
rte_write32_relaxed(val, addr)
;
+
*(uint32_t *)addr = val
;
rte_io_wmb();
rte_io_wmb();
- rte_write32_relaxed(val >> 32,
- (volatile void *)((volatile char *)addr + 4));
+ *((uint32_t *)addr + 1) = val >> 32;
rte_spinlock_unlock(lock);
#endif
}
rte_spinlock_unlock(lock);
#endif
}
@@
-407,7
+407,7
@@
__mlx5_uar_write64_relaxed(uint64_t val, volatile void *addr,
* Address of the lock to use for that UAR access.
*/
static __rte_always_inline void
* Address of the lock to use for that UAR access.
*/
static __rte_always_inline void
-__mlx5_uar_write64(uint64_t val, vo
latile vo
id *addr, rte_spinlock_t *lock)
+__mlx5_uar_write64(uint64_t val, void *addr, rte_spinlock_t *lock)
{
rte_io_wmb();
__mlx5_uar_write64_relaxed(val, addr, lock);
{
rte_io_wmb();
__mlx5_uar_write64_relaxed(val, addr, lock);