-static int
-nfp_net_rx_fill_freelist(struct nfp_net_rxq *rxq)
-{
- struct nfp_net_rx_buff *rxe = rxq->rxbufs;
- uint64_t dma_addr;
- unsigned i;
-
- PMD_RX_LOG(DEBUG, "nfp_net_rx_fill_freelist for %u descriptors\n",
- rxq->rx_count);
-
- for (i = 0; i < rxq->rx_count; i++) {
- struct nfp_net_rx_desc *rxd;
- struct rte_mbuf *mbuf = rte_pktmbuf_alloc(rxq->mem_pool);
-
- if (mbuf == NULL) {
- RTE_LOG(ERR, PMD, "RX mbuf alloc failed queue_id=%u\n",
- (unsigned)rxq->qidx);
- return -ENOMEM;
- }
-
- dma_addr = rte_cpu_to_le_64(RTE_MBUF_DMA_ADDR_DEFAULT(mbuf));
-
- rxd = &rxq->rxds[i];
- rxd->fld.dd = 0;
- rxd->fld.dma_addr_hi = (dma_addr >> 32) & 0xff;
- rxd->fld.dma_addr_lo = dma_addr & 0xffffffff;
- rxe[i].mbuf = mbuf;
- PMD_RX_LOG(DEBUG, "[%d]: %" PRIx64 "\n", i, dma_addr);
- }
-
- /* Make sure all writes are flushed before telling the hardware */
- rte_wmb();
-
- /* Not advertising the whole ring as the firmware gets confused if so */
- PMD_RX_LOG(DEBUG, "Increment FL write pointer in %u\n",
- rxq->rx_count - 1);
-
- nfp_qcp_ptr_add(rxq->qcp_fl, NFP_QCP_WRITE_PTR, rxq->rx_count - 1);
-
- return 0;
-}
-
-static int
-nfp_net_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
- uint16_t nb_desc, unsigned int socket_id,
- const struct rte_eth_txconf *tx_conf)
-{
- const struct rte_memzone *tz;
- struct nfp_net_txq *txq;
- uint16_t tx_free_thresh;
- struct nfp_net_hw *hw;
-
- hw = NFP_NET_DEV_PRIVATE_TO_HW(dev->data->dev_private);
-
- PMD_INIT_FUNC_TRACE();
-
- /* Validating number of descriptors */
- if (((nb_desc * sizeof(struct nfp_net_tx_desc)) % 128) != 0 ||
- (nb_desc > NFP_NET_MAX_TX_DESC) ||
- (nb_desc < NFP_NET_MIN_TX_DESC)) {
- RTE_LOG(ERR, PMD, "Wrong nb_desc value\n");
- return -EINVAL;
- }
-
- tx_free_thresh = (uint16_t)((tx_conf->tx_free_thresh) ?
- tx_conf->tx_free_thresh :
- DEFAULT_TX_FREE_THRESH);
-
- if (tx_free_thresh > (nb_desc)) {
- RTE_LOG(ERR, PMD,
- "tx_free_thresh must be less than the number of TX "
- "descriptors. (tx_free_thresh=%u port=%d "
- "queue=%d)\n", (unsigned int)tx_free_thresh,
- dev->data->port_id, (int)queue_idx);
- return -(EINVAL);
- }
-
- /*
- * Free memory prior to re-allocation if needed. This is the case after
- * calling nfp_net_stop
- */
- if (dev->data->tx_queues[queue_idx]) {
- PMD_TX_LOG(DEBUG, "Freeing memory prior to re-allocation %d\n",
- queue_idx);
- nfp_net_tx_queue_release(dev->data->tx_queues[queue_idx]);
- dev->data->tx_queues[queue_idx] = NULL;
- }
-
- /* Allocating tx queue data structure */
- txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct nfp_net_txq),
- RTE_CACHE_LINE_SIZE, socket_id);
- if (txq == NULL) {
- RTE_LOG(ERR, PMD, "Error allocating tx dma\n");
- return -ENOMEM;
- }
-
- /*
- * Allocate TX ring hardware descriptors. A memzone large enough to
- * handle the maximum ring size is allocated in order to allow for
- * resizing in later calls to the queue setup function.
- */
- tz = rte_eth_dma_zone_reserve(dev, "tx_ring", queue_idx,
- sizeof(struct nfp_net_tx_desc) *
- NFP_NET_MAX_TX_DESC, NFP_MEMZONE_ALIGN,
- socket_id);
- if (tz == NULL) {
- RTE_LOG(ERR, PMD, "Error allocating tx dma\n");
- nfp_net_tx_queue_release(txq);
- return -ENOMEM;
- }
-
- txq->tx_count = nb_desc;
- txq->tx_free_thresh = tx_free_thresh;
- txq->tx_pthresh = tx_conf->tx_thresh.pthresh;
- txq->tx_hthresh = tx_conf->tx_thresh.hthresh;
- txq->tx_wthresh = tx_conf->tx_thresh.wthresh;
-
- /* queue mapping based on firmware configuration */
- txq->qidx = queue_idx;
- txq->tx_qcidx = queue_idx * hw->stride_tx;
- txq->qcp_q = hw->tx_bar + NFP_QCP_QUEUE_OFF(txq->tx_qcidx);
-
- txq->port_id = dev->data->port_id;
- txq->txq_flags = tx_conf->txq_flags;
-
- /* Saving physical and virtual addresses for the TX ring */
- txq->dma = (uint64_t)tz->iova;
- txq->txds = (struct nfp_net_tx_desc *)tz->addr;
-
- /* mbuf pointers array for referencing mbufs linked to TX descriptors */
- txq->txbufs = rte_zmalloc_socket("txq->txbufs",
- sizeof(*txq->txbufs) * nb_desc,
- RTE_CACHE_LINE_SIZE, socket_id);
- if (txq->txbufs == NULL) {
- nfp_net_tx_queue_release(txq);
- return -ENOMEM;
- }
- PMD_TX_LOG(DEBUG, "txbufs=%p hw_ring=%p dma_addr=0x%" PRIx64 "\n",
- txq->txbufs, txq->txds, (unsigned long int)txq->dma);
-
- nfp_net_reset_tx_queue(txq);
-
- dev->data->tx_queues[queue_idx] = txq;
- txq->hw = hw;
-
- /*
- * Telling the HW about the physical address of the TX ring and number
- * of descriptors in log2 format
- */
- nn_cfg_writeq(hw, NFP_NET_CFG_TXR_ADDR(queue_idx), txq->dma);
- nn_cfg_writeb(hw, NFP_NET_CFG_TXR_SZ(queue_idx), rte_log2_u32(nb_desc));
-
- return 0;
-}
-
-/* nfp_net_tx_tso - Set TX descriptor for TSO */
-static inline void
-nfp_net_tx_tso(struct nfp_net_txq *txq, struct nfp_net_tx_desc *txd,
- struct rte_mbuf *mb)
-{
- uint64_t ol_flags;
- struct nfp_net_hw *hw = txq->hw;
-
- if (!(hw->cap & NFP_NET_CFG_CTRL_LSO))
- goto clean_txd;
-
- ol_flags = mb->ol_flags;
-
- if (!(ol_flags & PKT_TX_TCP_SEG))
- goto clean_txd;
-
- txd->l4_offset = mb->l2_len + mb->l3_len + mb->l4_len;
- txd->lso = rte_cpu_to_le_16(mb->tso_segsz);
- txd->flags = PCIE_DESC_TX_LSO;
- return;
-
-clean_txd:
- txd->flags = 0;
- txd->l4_offset = 0;
- txd->lso = 0;
-}
-
-/* nfp_net_tx_cksum - Set TX CSUM offload flags in TX descriptor */
-static inline void
-nfp_net_tx_cksum(struct nfp_net_txq *txq, struct nfp_net_tx_desc *txd,
- struct rte_mbuf *mb)
-{
- uint64_t ol_flags;
- struct nfp_net_hw *hw = txq->hw;
-
- if (!(hw->cap & NFP_NET_CFG_CTRL_TXCSUM))
- return;
-
- ol_flags = mb->ol_flags;
-
- /* IPv6 does not need checksum */
- if (ol_flags & PKT_TX_IP_CKSUM)
- txd->flags |= PCIE_DESC_TX_IP4_CSUM;
-
- switch (ol_flags & PKT_TX_L4_MASK) {
- case PKT_TX_UDP_CKSUM:
- txd->flags |= PCIE_DESC_TX_UDP_CSUM;
- break;
- case PKT_TX_TCP_CKSUM:
- txd->flags |= PCIE_DESC_TX_TCP_CSUM;
- break;
- }
-
- if (ol_flags & (PKT_TX_IP_CKSUM | PKT_TX_L4_MASK))
- txd->flags |= PCIE_DESC_TX_CSUM;
-}
-
-/* nfp_net_rx_cksum - set mbuf checksum flags based on RX descriptor flags */
-static inline void
-nfp_net_rx_cksum(struct nfp_net_rxq *rxq, struct nfp_net_rx_desc *rxd,
- struct rte_mbuf *mb)
-{
- struct nfp_net_hw *hw = rxq->hw;
-
- if (!(hw->ctrl & NFP_NET_CFG_CTRL_RXCSUM))
- return;
-
- /* If IPv4 and IP checksum error, fail */
- if ((rxd->rxd.flags & PCIE_DESC_RX_IP4_CSUM) &&
- !(rxd->rxd.flags & PCIE_DESC_RX_IP4_CSUM_OK))
- mb->ol_flags |= PKT_RX_IP_CKSUM_BAD;
-
- /* If neither UDP nor TCP return */
- if (!(rxd->rxd.flags & PCIE_DESC_RX_TCP_CSUM) &&
- !(rxd->rxd.flags & PCIE_DESC_RX_UDP_CSUM))
- return;
-
- if ((rxd->rxd.flags & PCIE_DESC_RX_TCP_CSUM) &&
- !(rxd->rxd.flags & PCIE_DESC_RX_TCP_CSUM_OK))
- mb->ol_flags |= PKT_RX_L4_CKSUM_BAD;
-
- if ((rxd->rxd.flags & PCIE_DESC_RX_UDP_CSUM) &&
- !(rxd->rxd.flags & PCIE_DESC_RX_UDP_CSUM_OK))
- mb->ol_flags |= PKT_RX_L4_CKSUM_BAD;
-}
-
-#define NFP_HASH_OFFSET ((uint8_t *)mbuf->buf_addr + mbuf->data_off - 4)
-#define NFP_HASH_TYPE_OFFSET ((uint8_t *)mbuf->buf_addr + mbuf->data_off - 8)
-
-#define NFP_DESC_META_LEN(d) (d->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK)
-
-/*
- * nfp_net_set_hash - Set mbuf hash data
- *
- * The RSS hash and hash-type are pre-pended to the packet data.
- * Extract and decode it and set the mbuf fields.
- */
-static inline void
-nfp_net_set_hash(struct nfp_net_rxq *rxq, struct nfp_net_rx_desc *rxd,
- struct rte_mbuf *mbuf)