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net/octeontx2: setup link config based on BP level
[dpdk.git]
/
drivers
/
net
/
qede
/
base
/
ecore_cxt.h
diff --git
a/drivers/net/qede/base/ecore_cxt.h
b/drivers/net/qede/base/ecore_cxt.h
index
e678118
..
55f0802
100644
(file)
--- a/
drivers/net/qede/base/ecore_cxt.h
+++ b/
drivers/net/qede/base/ecore_cxt.h
@@
-1,9
+1,7
@@
-/*
- * Copyright (c) 2016
QLogic Corporation
.
+/*
SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (c) 2016
- 2018 Cavium Inc
.
* All rights reserved.
* All rights reserved.
- * www.qlogic.com
- *
- * See LICENSE.qede_pmd for copyright and licensing details.
+ * www.cavium.com
*/
#ifndef _ECORE_CID_
*/
#ifndef _ECORE_CID_
@@
-24,6
+22,18
@@
enum ecore_cxt_elem_type {
ECORE_ELEM_TASK
};
ECORE_ELEM_TASK
};
+enum ilt_clients {
+ ILT_CLI_CDUC,
+ ILT_CLI_CDUT,
+ ILT_CLI_QM,
+ ILT_CLI_TM,
+ ILT_CLI_SRC,
+ ILT_CLI_TSDM,
+ ILT_CLI_RGFS,
+ ILT_CLI_TGFS,
+ ILT_CLI_MAX
+};
+
u32 ecore_cxt_get_proto_cid_count(struct ecore_hwfn *p_hwfn,
enum protocol_type type,
u32 *vf_cid);
u32 ecore_cxt_get_proto_cid_count(struct ecore_hwfn *p_hwfn,
enum protocol_type type,
u32 *vf_cid);
@@
-98,15
+108,19
@@
void ecore_cxt_hw_init_common(struct ecore_hwfn *p_hwfn);
* @brief ecore_cxt_hw_init_pf - Initailze ILT and DQ, PF phase, per path.
*
* @param p_hwfn
* @brief ecore_cxt_hw_init_pf - Initailze ILT and DQ, PF phase, per path.
*
* @param p_hwfn
+ * @param p_ptt
*/
*/
-void ecore_cxt_hw_init_pf(struct ecore_hwfn *p_hwfn);
+void ecore_cxt_hw_init_pf(struct ecore_hwfn *p_hwfn
, struct ecore_ptt *p_ptt
);
/**
* @brief ecore_qm_init_pf - Initailze the QM PF phase, per path
*
* @param p_hwfn
/**
* @brief ecore_qm_init_pf - Initailze the QM PF phase, per path
*
* @param p_hwfn
+ * @param p_ptt
+ * @param is_pf_loading
*/
*/
-void ecore_qm_init_pf(struct ecore_hwfn *p_hwfn);
+void ecore_qm_init_pf(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
+ bool is_pf_loading);
/**
* @brief Reconfigures QM pf on the fly
/**
* @brief Reconfigures QM pf on the fly
@@
-197,9
+211,5
@@
enum _ecore_status_t ecore_cxt_free_proto_ilt(struct ecore_hwfn *p_hwfn,
#define ECORE_CTX_WORKING_MEM 0
#define ECORE_CTX_FL_MEM 1
#define ECORE_CTX_WORKING_MEM 0
#define ECORE_CTX_FL_MEM 1
-enum _ecore_status_t ecore_cxt_get_task_ctx(struct ecore_hwfn *p_hwfn,
- u32 tid,
- u8 ctx_type,
- void **task_ctx);
#endif /* _ECORE_CID_ */
#endif /* _ECORE_CID_ */