+#endif /* UNUSED_HSI_FUNC */
+#ifndef UNUSED_HSI_FUNC
+
+#define ARR_REG_WR(dev, ptt, addr, arr, arr_size) \
+ do { \
+ u32 i; \
+ for (i = 0; i < (arr_size); i++) \
+ ecore_wr(dev, ptt, ((addr) + (4 * i)), \
+ ((u32 *)&(arr))[i]); \
+ } while (0)
+
+#ifndef DWORDS_TO_BYTES
+#define DWORDS_TO_BYTES(dwords) ((dwords) * REG_SIZE)
+#endif
+
+
+/**
+ * @brief ecore_dmae_to_grc - is an internal function - writes from host to
+ * wide-bus registers (split registers are not supported yet)
+ *
+ * @param p_hwfn - HW device data
+ * @param p_ptt - ptt window used for writing the registers.
+ * @param pData - pointer to source data.
+ * @param addr - Destination register address.
+ * @param len_in_dwords - data length in DWARDS (u32)
+ */
+static int ecore_dmae_to_grc(struct ecore_hwfn *p_hwfn,
+ struct ecore_ptt *p_ptt,
+ u32 *pData,
+ u32 addr,
+ u32 len_in_dwords)
+{
+ struct dmae_params params;
+ bool read_using_dmae = false;
+
+ if (!pData)
+ return -1;
+
+ /* Set DMAE params */
+ OSAL_MEMSET(¶ms, 0, sizeof(params));
+
+ SET_FIELD(params.flags, DMAE_PARAMS_COMPLETION_DST, 1);
+
+ /* Execute DMAE command */
+ read_using_dmae = !ecore_dmae_host2grc(p_hwfn, p_ptt,
+ (u64)(osal_uintptr_t)(pData),
+ addr, len_in_dwords, ¶ms);
+ if (!read_using_dmae)
+ DP_VERBOSE(p_hwfn, ECORE_MSG_DEBUG,
+ "Failed writing to chip using DMAE, using GRC instead\n");
+
+ /* If not read using DMAE, read using GRC */
+ if (!read_using_dmae)
+ /* write to registers using GRC */
+ ARR_REG_WR(p_hwfn, p_ptt, addr, pData, len_in_dwords);
+
+ return len_in_dwords;
+}
+
+/* In MF, should be called once per port to set EtherType of OuterTag */