#define PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF 0xA11E
#define PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF 0xA134
#define PCI_SUB_DEVICE_ID_CN81XX_NICVF 0xA234
#define PCI_SUB_DEVICE_ID_CN88XX_PASS1_NICVF 0xA11E
#define PCI_SUB_DEVICE_ID_CN88XX_PASS2_NICVF 0xA134
#define PCI_SUB_DEVICE_ID_CN81XX_NICVF 0xA234
#define NICVF_CAP_TUNNEL_PARSING (1ULL << 0)
/* Additional word in Rx descriptor to hold optional tunneling extension info */
#define NICVF_CAP_CQE_RX2 (1ULL << 1)
#define NICVF_CAP_TUNNEL_PARSING (1ULL << 0)
/* Additional word in Rx descriptor to hold optional tunneling extension info */
#define NICVF_CAP_CQE_RX2 (1ULL << 1)
int nicvf_rss_config(struct nicvf *nic, uint32_t qcnt, uint64_t cfg);
int nicvf_rss_term(struct nicvf *nic);
int nicvf_rss_config(struct nicvf *nic, uint32_t qcnt, uint64_t cfg);
int nicvf_rss_term(struct nicvf *nic);