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net/txgbe: support VF start and stop
[dpdk.git]
/
drivers
/
net
/
txgbe
/
txgbe_ethdev.c
diff --git
a/drivers/net/txgbe/txgbe_ethdev.c
b/drivers/net/txgbe/txgbe_ethdev.c
index
6f38eeb
..
90137d0
100644
(file)
--- a/
drivers/net/txgbe/txgbe_ethdev.c
+++ b/
drivers/net/txgbe/txgbe_ethdev.c
@@
-7,7
+7,7
@@
#include <stdint.h>
#include <string.h>
#include <rte_common.h>
#include <stdint.h>
#include <string.h>
#include <rte_common.h>
-#include <
rte_
ethdev_pci.h>
+#include <ethdev_pci.h>
#include <rte_interrupts.h>
#include <rte_log.h>
#include <rte_interrupts.h>
#include <rte_log.h>
@@
-547,6
+547,12
@@
eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
/* Unlock any pending hardware semaphore */
txgbe_swfw_lock_reset(hw);
/* Unlock any pending hardware semaphore */
txgbe_swfw_lock_reset(hw);
+#ifdef RTE_LIB_SECURITY
+ /* Initialize security_ctx only for primary process*/
+ if (txgbe_ipsec_ctx_create(eth_dev))
+ return -ENOMEM;
+#endif
+
/* Initialize DCB configuration*/
memset(dcb_config, 0, sizeof(struct txgbe_dcb_config));
txgbe_dcb_init(hw, dcb_config);
/* Initialize DCB configuration*/
memset(dcb_config, 0, sizeof(struct txgbe_dcb_config));
txgbe_dcb_init(hw, dcb_config);
@@
-1963,6
+1969,10
@@
txgbe_dev_close(struct rte_eth_dev *dev)
/* Remove all Traffic Manager configuration */
txgbe_tm_conf_uninit(dev);
/* Remove all Traffic Manager configuration */
txgbe_tm_conf_uninit(dev);
+#ifdef RTE_LIB_SECURITY
+ rte_free(dev->security_ctx);
+#endif
+
return ret;
}
return ret;
}
@@
-3247,7
+3257,7
@@
txgbe_dev_rss_reta_update(struct rte_eth_dev *dev,
if (!mask)
continue;
if (!mask)
continue;
- reta = rd32a(hw, TXGBE_REG_RSSTBL, i >> 2);
+ reta = rd32a
t
(hw, TXGBE_REG_RSSTBL, i >> 2);
for (j = 0; j < 4; j++) {
if (RS8(mask, j, 0x1)) {
reta &= ~(MS32(8 * j, 0xFF));
for (j = 0; j < 4; j++) {
if (RS8(mask, j, 0x1)) {
reta &= ~(MS32(8 * j, 0xFF));
@@
-3255,7
+3265,7
@@
txgbe_dev_rss_reta_update(struct rte_eth_dev *dev,
8 * j, 0xFF);
}
}
8 * j, 0xFF);
}
}
- wr32a(hw, TXGBE_REG_RSSTBL, i >> 2, reta);
+ wr32a
t
(hw, TXGBE_REG_RSSTBL, i >> 2, reta);
}
adapter->rss_reta_updated = 1;
}
adapter->rss_reta_updated = 1;
@@
-3288,7
+3298,7
@@
txgbe_dev_rss_reta_query(struct rte_eth_dev *dev,
if (!mask)
continue;
if (!mask)
continue;
- reta = rd32a(hw, TXGBE_REG_RSSTBL, i >> 2);
+ reta = rd32a
t
(hw, TXGBE_REG_RSSTBL, i >> 2);
for (j = 0; j < 4; j++) {
if (RS8(mask, j, 0x1))
reta_conf[idx].reta[shift + j] =
for (j = 0; j < 4; j++) {
if (RS8(mask, j, 0x1))
reta_conf[idx].reta[shift + j] =
@@
-4111,7
+4121,7
@@
txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
hw = TXGBE_DEV_HW(dev);
mc_addr_list = (u8 *)mc_addr_set;
hw = TXGBE_DEV_HW(dev);
mc_addr_list = (u8 *)mc_addr_set;
- return
txgbe_
update_mc_addr_list(hw, mc_addr_list, nb_mc_addr,
+ return
hw->mac.
update_mc_addr_list(hw, mc_addr_list, nb_mc_addr,
txgbe_dev_addr_list_itr, TRUE);
}
txgbe_dev_addr_list_itr, TRUE);
}
@@
-4514,6
+4524,7
@@
txgbe_rss_update_sp(enum txgbe_mac_type mac_type)
{
switch (mac_type) {
case txgbe_mac_raptor:
{
switch (mac_type) {
case txgbe_mac_raptor:
+ case txgbe_mac_raptor_vf:
return 1;
default:
return 0;
return 1;
default:
return 0;