+static void
+sdp_vf_disable_iq(struct sdp_device *sdpvf, uint32_t q_no)
+{
+ volatile uint64_t reg_val = 0ull;
+
+ /* Reset the doorbell register for this Input Queue. */
+ reg_val = otx2_read64(sdpvf->hw_addr + SDP_VF_R_IN_ENABLE(q_no));
+ reg_val &= ~0x1ull;
+
+ otx2_write64(reg_val, sdpvf->hw_addr + SDP_VF_R_IN_ENABLE(q_no));
+}
+
+static void
+sdp_vf_disable_oq(struct sdp_device *sdpvf, uint32_t q_no)
+{
+ volatile uint64_t reg_val = 0ull;
+
+ reg_val = otx2_read64(sdpvf->hw_addr + SDP_VF_R_OUT_ENABLE(q_no));
+ reg_val &= ~0x1ull;
+
+ otx2_write64(reg_val, sdpvf->hw_addr + SDP_VF_R_OUT_ENABLE(q_no));
+
+}
+
+static void
+sdp_vf_disable_io_queues(struct sdp_device *sdpvf)
+{
+ uint32_t q_no = 0;
+
+ /* Disable Input Queues. */
+ for (q_no = 0; q_no < sdpvf->num_iqs; q_no++)
+ sdp_vf_disable_iq(sdpvf, q_no);
+
+ /* Disable Output Queues. */
+ for (q_no = 0; q_no < sdpvf->num_oqs; q_no++)
+ sdp_vf_disable_oq(sdpvf, q_no);
+}
+
+static uint32_t
+sdp_vf_update_read_index(struct sdp_instr_queue *iq)
+{
+ uint32_t new_idx = rte_read32(iq->inst_cnt_reg);
+
+ /* The new instr cnt reg is a 32-bit counter that can roll over.
+ * We have noted the counter's initial value at init time into
+ * reset_instr_cnt
+ */
+ if (iq->reset_instr_cnt < new_idx)
+ new_idx -= iq->reset_instr_cnt;
+ else
+ new_idx += (0xffffffff - iq->reset_instr_cnt) + 1;
+
+ /* Modulo of the new index with the IQ size will give us
+ * the new index.
+ */
+ new_idx %= iq->nb_desc;
+
+ return new_idx;
+}
+