+ return -EINVAL;
+}
+
+/*
+ * Check if input alg is supported by given platform/binary.
+ * Note that both conditions should be met:
+ * - at build time compiler supports ISA used by given methods
+ * - at run time target cpu supports necessary ISA.
+ */
+static int
+acl_check_alg(enum rte_acl_classify_alg alg)
+{
+ switch (alg) {
+ case RTE_ACL_CLASSIFY_NEON:
+ return acl_check_alg_arm(alg);
+ case RTE_ACL_CLASSIFY_ALTIVEC:
+ return acl_check_alg_ppc(alg);
+ case RTE_ACL_CLASSIFY_AVX512X32:
+ case RTE_ACL_CLASSIFY_AVX512X16:
+ case RTE_ACL_CLASSIFY_AVX2:
+ case RTE_ACL_CLASSIFY_SSE:
+ return acl_check_alg_x86(alg);
+ /* scalar method is supported on all platforms */
+ case RTE_ACL_CLASSIFY_SCALAR:
+ return 0;
+ default:
+ return -EINVAL;
+ }
+}
+
+/*
+ * Get preferred alg for given platform.
+ */
+static enum rte_acl_classify_alg
+acl_get_best_alg(void)
+{
+ /*
+ * array of supported methods for each platform.
+ * Note that order is important - from most to less preferable.
+ */
+ static const enum rte_acl_classify_alg alg[] = {
+#if defined(RTE_ARCH_ARM)
+ RTE_ACL_CLASSIFY_NEON,
+#elif defined(RTE_ARCH_PPC_64)
+ RTE_ACL_CLASSIFY_ALTIVEC,
+#elif defined(RTE_ARCH_X86)
+ RTE_ACL_CLASSIFY_AVX512X32,
+ RTE_ACL_CLASSIFY_AVX512X16,
+ RTE_ACL_CLASSIFY_AVX2,
+ RTE_ACL_CLASSIFY_SSE,
+#endif
+ RTE_ACL_CLASSIFY_SCALAR,
+ };
+
+ uint32_t i;
+
+ /* find best possible alg */
+ for (i = 0; i != RTE_DIM(alg) && acl_check_alg(alg[i]) != 0; i++)
+ ;
+
+ /* we always have to find something suitable */
+ RTE_VERIFY(i != RTE_DIM(alg));
+ return alg[i];
+}
+
+extern int
+rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
+{
+ int32_t rc;
+
+ /* formal parameters check */
+ if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
+ return -EINVAL;
+
+ /* user asked us to select the *best* one */
+ if (alg == RTE_ACL_CLASSIFY_DEFAULT)
+ alg = acl_get_best_alg();
+
+ /* check that given alg is supported */
+ rc = acl_check_alg(alg);
+ if (rc != 0)
+ return rc;
+
+ ctx->alg = alg;
+ return 0;