- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
- * * Neither the name of Intel Corporation nor the names of its
- * contributors may be used to endorse or promote products derived
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tc_period;
uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tc_period;
/* Traffic classes (TCs) */
uint64_t tc_time; /* time of next update */
uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
/* Traffic classes (TCs) */
uint64_t tc_time; /* time of next update */
uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
/* WRR */
uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
/* WRR */
uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
uint64_t time; /* Current NIC TX time measured in bytes */
double cycles_per_byte; /* CPU cycles per byte */
uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
uint64_t time; /* Current NIC TX time measured in bytes */
double cycles_per_byte; /* CPU cycles per byte */
/* Large data structures */
struct rte_sched_subport *subport;
struct rte_sched_pipe *pipe;
/* Large data structures */
struct rte_sched_subport *subport;
struct rte_sched_pipe *pipe;
/* n_subports_per_port: non-zero, power of 2 */
if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
return -6;
/* n_subports_per_port: non-zero, power of 2 */
if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
return -6;
/* qsize: non-zero, power of 2, no bigger than 32K (due to 16-bit read/write pointers) */
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
uint16_t qsize = params->qsize[i];
/* qsize: non-zero, power of 2, no bigger than 32K (due to 16-bit read/write pointers) */
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
uint16_t qsize = params->qsize[i];
for (i = 0; i < params->n_pipe_profiles; i ++) {
struct rte_sched_pipe_params *p = params->pipe_profiles + i;
for (i = 0; i < params->n_pipe_profiles; i ++) {
struct rte_sched_pipe_params *p = params->pipe_profiles + i;
/* TB rate: non-zero, not greater than port rate */
if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
return -10;
}
/* TB rate: non-zero, not greater than port rate */
if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
return -10;
}
uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
uint32_t size_per_pipe_queue_array, size_queue_array;
uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
uint32_t size_per_pipe_queue_array, size_queue_array;
size_per_pipe_queue_array = 0;
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
}
size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
size_per_pipe_queue_array = 0;
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
}
size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
base += CACHE_LINE_ROUNDUP(size_pipe);
if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
base += CACHE_LINE_ROUNDUP(size_queue);
if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
base += CACHE_LINE_ROUNDUP(size_pipe);
if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
base += CACHE_LINE_ROUNDUP(size_queue);
if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
base += CACHE_LINE_ROUNDUP(size_queue_extra);
if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
base += CACHE_LINE_ROUNDUP(size_queue_extra);
if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
base += CACHE_LINE_ROUNDUP(size_pipe_profiles);
if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
base += CACHE_LINE_ROUNDUP(size_pipe_profiles);
status = rte_sched_port_check_params(params);
if (status != 0) {
RTE_LOG(INFO, SCHED, "Port scheduler params check failed (%d)\n", status);
status = rte_sched_port_check_params(params);
if (status != 0) {
RTE_LOG(INFO, SCHED, "Port scheduler params check failed (%d)\n", status);
size0 = sizeof(struct rte_sched_port);
size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
size0 = sizeof(struct rte_sched_port);
size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
/* TC 1 */
port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
/* TC 1 */
port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
{
struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
{
struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
RTE_LOG(INFO, SCHED, "Low level config for pipe profile %u:\n"
"\tToken bucket: period = %u, credits per period = %u, size = %u\n"
"\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
"\tTraffic class 3 oversubscription: weight = %hhu\n"
"\tWRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
i,
RTE_LOG(INFO, SCHED, "Low level config for pipe profile %u:\n"
"\tToken bucket: period = %u, credits per period = %u, size = %u\n"
"\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
"\tTraffic class 3 oversubscription: weight = %hhu\n"
"\tWRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
i,
/* Traffic classes */
p->tc_period,
p->tc_credits_per_period[0],
p->tc_credits_per_period[1],
p->tc_credits_per_period[2],
p->tc_credits_per_period[3],
/* Traffic classes */
p->tc_period,
p->tc_credits_per_period[0],
p->tc_credits_per_period[1],
p->tc_credits_per_period[2],
p->tc_credits_per_period[3],
/* WRR */
p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
/* WRR */
p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
for (i = 0; i < port->n_pipe_profiles; i ++) {
struct rte_sched_pipe_params *src = params->pipe_profiles + i;
struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
for (i = 0; i < port->n_pipe_profiles; i ++) {
struct rte_sched_pipe_params *src = params->pipe_profiles + i;
struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
} else {
double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
} else {
double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
}
dst->tb_size = src->tb_size;
rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
}
dst->tb_size = src->tb_size;
/* Traffic Classes */
dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
/* Traffic Classes */
dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
/* WRR */
for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
uint32_t lcd, lcd1, lcd2;
uint32_t qindex;
/* WRR */
for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
uint32_t lcd, lcd1, lcd2;
uint32_t qindex;
wrr_cost[0] = src->wrr_weights[qindex];
wrr_cost[1] = src->wrr_weights[qindex + 1];
wrr_cost[2] = src->wrr_weights[qindex + 2];
wrr_cost[3] = src->wrr_weights[qindex + 3];
wrr_cost[0] = src->wrr_weights[qindex];
wrr_cost[1] = src->wrr_weights[qindex + 1];
wrr_cost[2] = src->wrr_weights[qindex + 2];
wrr_cost[3] = src->wrr_weights[qindex + 3];
lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
lcd = rte_get_lcd(lcd1, lcd2);
lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
lcd = rte_get_lcd(lcd1, lcd2);
wrr_cost[1] = lcd / wrr_cost[1];
wrr_cost[2] = lcd / wrr_cost[2];
wrr_cost[3] = lcd / wrr_cost[3];
wrr_cost[1] = lcd / wrr_cost[1];
wrr_cost[2] = lcd / wrr_cost[2];
wrr_cost[3] = lcd / wrr_cost[3];
dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
}
dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
}
for (i = 0; i < port->n_pipe_profiles; i ++) {
struct rte_sched_pipe_params *src = params->pipe_profiles + i;
uint32_t pipe_tc3_rate = src->tc_rate[3];
for (i = 0; i < port->n_pipe_profiles; i ++) {
struct rte_sched_pipe_params *src = params->pipe_profiles + i;
uint32_t pipe_tc3_rate = src->tc_rate[3];
uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
/* Check user parameters. Determine the amount of memory to allocate */
mem_size = rte_sched_port_get_memory_footprint(params);
if (mem_size == 0) {
return NULL;
}
/* Check user parameters. Determine the amount of memory to allocate */
mem_size = rte_sched_port_get_memory_footprint(params);
if (mem_size == 0) {
return NULL;
}
- mz = rte_memzone_lookup(params->name);
- if (mz) {
- /* Use existing memzone, provided that its size is big enough */
- if (mz->len < mem_size) {
- return NULL;
- }
- } else {
- /* Create new memzone */
- mz = rte_memzone_reserve(params->name, mem_size, params->socket, 0);
- if (mz == NULL) {
- return NULL;
- }
+ port = rte_zmalloc("qos_params", mem_size, CACHE_LINE_SIZE);
+ if (port == NULL) {
+ return NULL;
for (j = 0; j < e_RTE_METER_COLORS; j++) {
if (rte_red_config_init(&port->red_config[i][j],
params->red_params[i][j].wq_log2,
for (j = 0; j < e_RTE_METER_COLORS; j++) {
if (rte_red_config_init(&port->red_config[i][j],
params->red_params[i][j].wq_log2,
/* Large data structures */
port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
/* Large data structures */
port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
/* Bitmap */
n_queues_per_port = rte_sched_port_queues_per_port(port);
bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
/* Bitmap */
n_queues_per_port = rte_sched_port_queues_per_port(port);
bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
}
for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
}
}
static void
rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
{
struct rte_sched_subport *s = port->subport + i;
}
static void
rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
{
struct rte_sched_subport *s = port->subport + i;
"\tToken bucket: period = %u, credits per period = %u, size = %u\n"
"\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
"\tTraffic class 3 oversubscription: wm min = %u, wm max = %u\n",
i,
"\tToken bucket: period = %u, credits per period = %u, size = %u\n"
"\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
"\tTraffic class 3 oversubscription: wm min = %u, wm max = %u\n",
i,
/* Traffic classes */
s->tc_period,
s->tc_credits_per_period[0],
s->tc_credits_per_period[1],
s->tc_credits_per_period[2],
s->tc_credits_per_period[3],
/* Traffic classes */
s->tc_period,
s->tc_credits_per_period[0],
s->tc_credits_per_period[1],
s->tc_credits_per_period[2],
s->tc_credits_per_period[3],
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
return -4;
}
}
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
return -4;
}
}
} else {
double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
} else {
double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
}
s->tb_size = params->tb_size;
s->tb_time = port->time;
s->tb_credits = s->tb_size / 2;
rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
}
s->tb_size = params->tb_size;
s->tb_time = port->time;
s->tb_credits = s->tb_size / 2;
/* Traffic Classes (TCs) */
s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
/* Traffic Classes (TCs) */
s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
s->tc_credits[i] = s->tc_credits_per_period[i];
}
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
s->tc_credits[i] = s->tc_credits_per_period[i];
}
#ifdef RTE_SCHED_SUBPORT_TC_OV
/* TC oversubscription */
s->tc_ov_wm_min = port->mtu;
#ifdef RTE_SCHED_SUBPORT_TC_OV
/* TC oversubscription */
s->tc_ov_wm_min = port->mtu;
struct rte_sched_pipe *p;
struct rte_sched_pipe_profile *params;
uint32_t deactivate, profile, i;
struct rte_sched_pipe *p;
struct rte_sched_pipe_profile *params;
uint32_t deactivate, profile, i;
/* Check user parameters */
profile = (uint32_t) pipe_profile;
deactivate = (pipe_profile < 0);
/* Check user parameters */
profile = (uint32_t) pipe_profile;
deactivate = (pipe_profile < 0);
/* Handle the case when pipe already has a valid configuration */
if (p->tb_time) {
params = port->pipe_profiles + p->profile;
/* Handle the case when pipe already has a valid configuration */
if (p->tb_time) {
params = port->pipe_profiles + p->profile;
double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
uint32_t tc3_ov = s->tc_ov;
double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
uint32_t tc3_ov = s->tc_ov;
/* Unplug pipe from its subport */
s->tc_ov_n -= params->tc_ov_weight;
s->tc_ov_rate -= pipe_tc3_rate;
s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
/* Unplug pipe from its subport */
s->tc_ov_n -= params->tc_ov_weight;
s->tc_ov_rate -= pipe_tc3_rate;
s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
- RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
+ RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
/* Traffic Classes (TCs) */
p->tc_time = port->time + params->tc_period;
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
p->tc_credits[i] = params->tc_credits_per_period[i];
}
/* Traffic Classes (TCs) */
p->tc_time = port->time + params->tc_period;
for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
p->tc_credits[i] = params->tc_credits_per_period[i];
}
#ifdef RTE_SCHED_SUBPORT_TC_OV
{
/* Subport TC3 oversubscription */
double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
uint32_t tc3_ov = s->tc_ov;
#ifdef RTE_SCHED_SUBPORT_TC_OV
{
/* Subport TC3 oversubscription */
double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
uint32_t tc3_ov = s->tc_ov;
s->tc_ov_n += params->tc_ov_weight;
s->tc_ov_rate += pipe_tc3_rate;
s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
s->tc_ov_n += params->tc_ov_weight;
s->tc_ov_rate += pipe_tc3_rate;
s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
- RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
+ RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
subport_id, subport_tc3_rate, s->tc_ov_rate);
}
p->tc_ov_period_id = s->tc_ov_period_id;
p->tc_ov_credits = s->tc_ov_wm;
}
#endif
subport_id, subport_tc3_rate, s->tc_ov_rate);
}
p->tc_ov_period_id = s->tc_ov_period_id;
p->tc_ov_credits = s->tc_ov_wm;
}
#endif
/* Copy subport stats and clear */
memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
/* Copy subport stats and clear */
memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
/* Copy queue stats and clear */
memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
/* Copy queue stats and clear */
memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
{
uint32_t result;
rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
{
uint32_t result;
result = subport * port->n_pipes_per_subport + pipe;
result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
result = subport * port->n_pipes_per_subport + pipe;
result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
{
uint32_t tc = (qindex >> 2) & 0x3;
rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
{
uint32_t tc = (qindex >> 2) & 0x3;
rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
{
struct rte_sched_queue *queue = port->queue + qindex;
rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
{
struct rte_sched_queue *queue = port->queue + qindex;
{
struct rte_sched_queue *queue = port->queue + qindex;
uint16_t qsize = rte_sched_port_qsize(port, qindex);
{
struct rte_sched_queue *queue = port->queue + qindex;
uint16_t qsize = rte_sched_port_qsize(port, qindex);
struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
uint32_t tc_index = (qindex >> 2) & 0x3;
uint32_t pkt_len = pkt->pkt.pkt_len;
struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
uint32_t tc_index = (qindex >> 2) & 0x3;
uint32_t pkt_len = pkt->pkt.pkt_len;
struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
uint32_t tc_index = (qindex >> 2) & 0x3;
uint32_t pkt_len = pkt->pkt.pkt_len;
struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
uint32_t tc_index = (qindex >> 2) & 0x3;
uint32_t pkt_len = pkt->pkt.pkt_len;
tc_index = (qindex >> 2) & 0x3;
color = rte_sched_port_pkt_read_color(pkt);
red_cfg = &port->red_config[tc_index][color];
tc_index = (qindex >> 2) & 0x3;
color = rte_sched_port_pkt_read_color(pkt);
red_cfg = &port->red_config[tc_index][color];
for (i = 0; i < 16; i ++){
uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
for (i = 0; i < 16; i ++){
uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
if (queue_empty != bmp_bit_clear){
rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
}
if (queue_empty != bmp_bit_clear){
rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
}
uint32_t subport, pipe, traffic_class, queue, qindex;
rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
uint32_t subport, pipe, traffic_class, queue, qindex;
rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
q = port->queue + qindex;
rte_prefetch0(q);
qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
q = port->queue + qindex;
rte_prefetch0(q);
return qindex;
}
static inline void
rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
return qindex;
}
static inline void
rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
q = port->queue + qindex;
qsize = rte_sched_port_qsize(port, qindex);
q_qw = qbase + (q->qw & (qsize - 1));
q = port->queue + qindex;
qsize = rte_sched_port_qsize(port, qindex);
q_qw = qbase + (q->qw & (qsize - 1));
/* Activate queue in the port bitmap */
rte_bitmap_set(port->bmp, qindex);
/* Activate queue in the port bitmap */
rte_bitmap_set(port->bmp, qindex);
/* Statistics */
#ifdef RTE_SCHED_COLLECT_STATS
rte_sched_port_update_subport_stats(port, qindex, pkt);
/* Statistics */
#ifdef RTE_SCHED_COLLECT_STATS
rte_sched_port_update_subport_stats(port, qindex, pkt);
for (i = 0; i < n_pkts; i ++) {
struct rte_mbuf *pkt;
struct rte_mbuf **q_base;
uint32_t subport, pipe, traffic_class, queue, qindex;
for (i = 0; i < n_pkts; i ++) {
struct rte_mbuf *pkt;
struct rte_mbuf **q_base;
uint32_t subport, pipe, traffic_class, queue, qindex;
rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
q_base = rte_sched_port_qbase(port, qindex);
result += rte_sched_port_enqueue_qwa(port, qindex, q_base, pkt);
}
q_base = rte_sched_port_qbase(port, qindex);
result += rte_sched_port_enqueue_qwa(port, qindex, q_base, pkt);
}
-/* The enqueue function implements a 4-level pipeline with each stage processing
- * two different packets. The purpose of using a pipeline is to hide the latency
+/* The enqueue function implements a 4-level pipeline with each stage processing
+ * two different packets. The purpose of using a pipeline is to hide the latency
uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
uint32_t result, i;
uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
uint32_t result, i;
/* Less then 6 input packets available, which is not enough to feed the pipeline */
if (unlikely(n_pkts < 6)) {
struct rte_mbuf **q_base[5];
uint32_t q[5];
/* Less then 6 input packets available, which is not enough to feed the pipeline */
if (unlikely(n_pkts < 6)) {
struct rte_mbuf **q_base[5];
uint32_t q[5];
/* Prefetch the queue structure for each queue */
for (i = 0; i < n_pkts; i ++) {
q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
}
/* Prefetch the queue structure for each queue */
for (i = 0; i < n_pkts; i ++) {
q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
}
/* Prefetch the write pointer location of each queue */
for (i = 0; i < n_pkts; i ++) {
q_base[i] = rte_sched_port_qbase(port, q[i]);
rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
}
/* Prefetch the write pointer location of each queue */
for (i = 0; i < n_pkts; i ++) {
q_base[i] = rte_sched_port_qbase(port, q[i]);
rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
}
/* Write each packet to its queue */
for (i = 0; i < n_pkts; i ++) {
result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
}
/* Write each packet to its queue */
for (i = 0; i < n_pkts; i ++) {
result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
}
q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
q20_base = rte_sched_port_qbase(port, q20);
q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
q20_base = rte_sched_port_qbase(port, q20);
rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
/* Stage 1: Prefetch queue structure storing queue pointers */
q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
/* Stage 1: Prefetch queue structure storing queue pointers */
q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
/* Stage 2: Prefetch queue write location */
q20_base = rte_sched_port_qbase(port, q20);
q21_base = rte_sched_port_qbase(port, q21);
rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
/* Stage 2: Prefetch queue write location */
q20_base = rte_sched_port_qbase(port, q20);
q21_base = rte_sched_port_qbase(port, q21);
rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
/* Stage 3: Write packet to queue and activate queue */
r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
result += r30 + r31;
}
/* Stage 3: Write packet to queue and activate queue */
r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
result += r30 + r31;
}
/* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
of an odd number of input packets. */
pkt_last = pkts[n_pkts - 1];
rte_prefetch0(pkt_last);
/* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
of an odd number of input packets. */
pkt_last = pkts[n_pkts - 1];
rte_prefetch0(pkt_last);
q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
q11_base = rte_sched_port_qbase(port, q11);
rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
q11_base = rte_sched_port_qbase(port, q11);
rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
result += r20 + r21;
r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
result += r20 + r21;
q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
q00_base = rte_sched_port_qbase(port, q00);
q01_base = rte_sched_port_qbase(port, q01);
rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
q00_base = rte_sched_port_qbase(port, q00);
q01_base = rte_sched_port_qbase(port, q01);
rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
result += r10 + r11;
r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
result += r10 + r11;
r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
result += r_last;
}
r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
result += r_last;
}
struct rte_sched_pipe *pipe = grinder->pipe;
struct rte_sched_pipe_profile *params = grinder->pipe_params;
uint64_t n_periods;
struct rte_sched_pipe *pipe = grinder->pipe;
struct rte_sched_pipe_profile *params = grinder->pipe_params;
uint64_t n_periods;
/* Subport TB */
n_periods = (port->time - subport->tb_time) / subport->tb_period;
subport->tb_credits += n_periods * subport->tb_credits_per_period;
subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
subport->tb_time += n_periods * subport->tb_period;
/* Subport TB */
n_periods = (port->time - subport->tb_time) / subport->tb_period;
subport->tb_credits += n_periods * subport->tb_credits_per_period;
subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
subport->tb_time += n_periods * subport->tb_period;
/* Pipe TB */
n_periods = (port->time - pipe->tb_time) / params->tb_period;
pipe->tb_credits += n_periods * params->tb_credits_per_period;
/* Pipe TB */
n_periods = (port->time - pipe->tb_time) / params->tb_period;
pipe->tb_credits += n_periods * params->tb_credits_per_period;
subport->tc_credits[3] = subport->tc_credits_per_period[3];
subport->tc_time = port->time + subport->tc_period;
}
subport->tc_credits[3] = subport->tc_credits_per_period[3];
subport->tc_time = port->time + subport->tc_period;
}
uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tc_ov_consumption_max;
uint32_t tc_ov_wm = subport->tc_ov_wm;
uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
uint32_t tc_ov_consumption_max;
uint32_t tc_ov_wm = subport->tc_ov_wm;
tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
tc_ov_wm -= tc_ov_wm >> 7;
if (tc_ov_wm < subport->tc_ov_wm_min) {
if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
tc_ov_wm -= tc_ov_wm >> 7;
if (tc_ov_wm < subport->tc_ov_wm_min) {
tc_ov_wm += (tc_ov_wm >> 7) + 1;
if (tc_ov_wm > subport->tc_ov_wm_max) {
tc_ov_wm = subport->tc_ov_wm_max;
tc_ov_wm += (tc_ov_wm >> 7) + 1;
if (tc_ov_wm > subport->tc_ov_wm_max) {
tc_ov_wm = subport->tc_ov_wm_max;
struct rte_sched_pipe *pipe = grinder->pipe;
struct rte_sched_pipe_profile *params = grinder->pipe_params;
uint64_t n_periods;
struct rte_sched_pipe *pipe = grinder->pipe;
struct rte_sched_pipe_profile *params = grinder->pipe_params;
uint64_t n_periods;
/* Subport TB */
n_periods = (port->time - subport->tb_time) / subport->tb_period;
subport->tb_credits += n_periods * subport->tb_credits_per_period;
subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
subport->tb_time += n_periods * subport->tb_period;
/* Subport TB */
n_periods = (port->time - subport->tb_time) / subport->tb_period;
subport->tb_credits += n_periods * subport->tb_credits_per_period;
subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
subport->tb_time += n_periods * subport->tb_period;
/* Pipe TB */
n_periods = (port->time - pipe->tb_time) / params->tb_period;
pipe->tb_credits += n_periods * params->tb_credits_per_period;
/* Pipe TB */
n_periods = (port->time - pipe->tb_time) / params->tb_period;
pipe->tb_credits += n_periods * params->tb_credits_per_period;
subport->tc_credits[1] = subport->tc_credits_per_period[1];
subport->tc_credits[2] = subport->tc_credits_per_period[2];
subport->tc_credits[3] = subport->tc_credits_per_period[3];
subport->tc_credits[1] = subport->tc_credits_per_period[1];
subport->tc_credits[2] = subport->tc_credits_per_period[2];
subport->tc_credits[3] = subport->tc_credits_per_period[3];
pipe->tc_credits[3] = params->tc_credits_per_period[3];
pipe->tc_time = port->time + params->tc_period;
}
pipe->tc_credits[3] = params->tc_credits_per_period[3];
pipe->tc_time = port->time + params->tc_period;
}
/* Pipe TCs - Oversubscription */
if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
/* Pipe TCs - Oversubscription */
if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
pipe->tc_ov_period_id = subport->tc_ov_period_id;
}
}
#endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
pipe->tc_ov_period_id = subport->tc_ov_period_id;
}
}
#endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
(pkt_len <= subport_tc_credits) &&
(pkt_len <= pipe_tb_credits) &&
(pkt_len <= pipe_tc_credits);
(pkt_len <= subport_tc_credits) &&
(pkt_len <= pipe_tb_credits) &&
(pkt_len <= pipe_tc_credits);
/* Update port credits */
subport->tb_credits -= pkt_len;
subport->tc_credits[tc_index] -= pkt_len;
/* Update port credits */
subport->tb_credits -= pkt_len;
subport->tc_credits[tc_index] -= pkt_len;
uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
int enough_credits;
uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
int enough_credits;
/* Check pipe and subport credits */
enough_credits = (pkt_len <= subport_tb_credits) &&
(pkt_len <= subport_tc_credits) &&
(pkt_len <= pipe_tb_credits) &&
(pkt_len <= pipe_tc_credits) &&
(pkt_len <= pipe_tc_ov_credits);
/* Check pipe and subport credits */
enough_credits = (pkt_len <= subport_tb_credits) &&
(pkt_len <= subport_tc_credits) &&
(pkt_len <= pipe_tb_credits) &&
(pkt_len <= pipe_tc_credits) &&
(pkt_len <= pipe_tc_ov_credits);
/* Update pipe and subport credits */
subport->tb_credits -= pkt_len;
subport->tc_credits[tc_index] -= pkt_len;
pipe->tb_credits -= pkt_len;
pipe->tc_credits[tc_index] -= pkt_len;
pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
/* Update pipe and subport credits */
subport->tb_credits -= pkt_len;
subport->tc_credits[tc_index] -= pkt_len;
pipe->tb_credits -= pkt_len;
pipe->tc_credits[tc_index] -= pkt_len;
pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
grinder_schedule(struct rte_sched_port *port, uint32_t pos)
{
struct rte_sched_grinder *grinder = port->grinder + pos;
grinder_schedule(struct rte_sched_port *port, uint32_t pos)
{
struct rte_sched_grinder *grinder = port->grinder + pos;
grinder->wrr_mask[grinder->qpos] = 0;
rte_sched_port_set_queue_empty_timestamp(port, qindex);
}
grinder->wrr_mask[grinder->qpos] = 0;
rte_sched_port_set_queue_empty_timestamp(port, qindex);
}
w[0] = (uint16_t) bmp_slab;
w[1] = (uint16_t) (bmp_slab >> 16);
w[2] = (uint16_t) (bmp_slab >> 32);
w[3] = (uint16_t) (bmp_slab >> 48);
w[0] = (uint16_t) bmp_slab;
w[1] = (uint16_t) (bmp_slab >> 16);
w[2] = (uint16_t) (bmp_slab >> 32);
w[3] = (uint16_t) (bmp_slab >> 48);
grinder->pcache_qmask[grinder->pcache_w] = w[0];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
grinder->pcache_w += (w[0] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[0];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
grinder->pcache_w += (w[0] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[1];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
grinder->pcache_w += (w[1] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[1];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
grinder->pcache_w += (w[1] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[2];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
grinder->pcache_w += (w[2] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[2];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
grinder->pcache_w += (w[2] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[3];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
grinder->pcache_w += (w[3] != 0);
grinder->pcache_qmask[grinder->pcache_w] = w[3];
grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
grinder->pcache_w += (w[3] != 0);
b[0] = (uint8_t) (qmask & 0xF);
b[1] = (uint8_t) ((qmask >> 4) & 0xF);
b[2] = (uint8_t) ((qmask >> 8) & 0xF);
b[3] = (uint8_t) ((qmask >> 12) & 0xF);
b[0] = (uint8_t) (qmask & 0xF);
b[1] = (uint8_t) ((qmask >> 4) & 0xF);
b[2] = (uint8_t) ((qmask >> 8) & 0xF);
b[3] = (uint8_t) ((qmask >> 12) & 0xF);
grinder->tccache_qmask[grinder->tccache_w] = b[0];
grinder->tccache_qindex[grinder->tccache_w] = qindex;
grinder->tccache_w += (b[0] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[0];
grinder->tccache_qindex[grinder->tccache_w] = qindex;
grinder->tccache_w += (b[0] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[1];
grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
grinder->tccache_w += (b[1] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[1];
grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
grinder->tccache_w += (b[1] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[2];
grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
grinder->tccache_w += (b[2] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[2];
grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
grinder->tccache_w += (b[2] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[3];
grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
grinder->tccache_w += (b[3] != 0);
grinder->tccache_qmask[grinder->tccache_w] = b[3];
grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
grinder->tccache_w += (b[3] != 0);
grinder->tc_index = (qindex >> 2) & 0x3;
grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
grinder->qsize = qsize;
grinder->tc_index = (qindex >> 2) & 0x3;
grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
grinder->qsize = qsize;
grinder->qindex[0] = qindex;
grinder->qindex[1] = qindex + 1;
grinder->qindex[2] = qindex + 2;
grinder->qindex[0] = qindex;
grinder->qindex[1] = qindex + 1;
grinder->qindex[2] = qindex + 2;
grinder->qbase[1] = qbase + qsize;
grinder->qbase[2] = qbase + 2 * qsize;
grinder->qbase[3] = qbase + 3 * qsize;
grinder->qbase[1] = qbase + qsize;
grinder->qbase[2] = qbase + 2 * qsize;
grinder->qbase[3] = qbase + 3 * qsize;
/* Return if pipe group already in one of the other grinders */
port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
/* Return if pipe group already in one of the other grinders */
port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
/* Install new pipe group into grinder's pipe cache */
grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
/* Install new pipe group into grinder's pipe cache */
grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
/* Install new pipe in the grinder */
grinder->pindex = pipe_qindex >> 4;
grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
/* Install new pipe in the grinder */
grinder->pindex = pipe_qindex >> 4;
grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
grinder_next_tc(port, pos);
grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
grinder_next_tc(port, pos);
/* Check for pipe exhaustion */
if (grinder->pindex == port->pipe_loop) {
port->pipe_exhaustion = 1;
port->pipe_loop = RTE_SCHED_PIPE_INVALID;
}
/* Check for pipe exhaustion */
if (grinder->pindex == port->pipe_loop) {
port->pipe_exhaustion = 1;
port->pipe_loop = RTE_SCHED_PIPE_INVALID;
}
if (rte_bsf64(slab, &grinder->qpos) == 0) {
rte_panic("grinder wrr\n");
}
if (rte_bsf64(slab, &grinder->qpos) == 0) {
rte_panic("grinder wrr\n");
}
grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
grinder->wrr_tokens[0] -= wrr_tokens_min;
grinder->wrr_tokens[1] -= wrr_tokens_min;
grinder->wrr_tokens[2] -= wrr_tokens_min;
grinder->wrr_tokens[0] -= wrr_tokens_min;
grinder->wrr_tokens[1] -= wrr_tokens_min;
grinder->wrr_tokens[2] -= wrr_tokens_min;
grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
{
struct rte_sched_grinder *grinder = port->grinder + pos;
grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
{
struct rte_sched_grinder *grinder = port->grinder + pos;
qsize = grinder->qsize;
qr[0] = grinder->queue[0]->qr & (qsize - 1);
qr[1] = grinder->queue[1]->qr & (qsize - 1);
qr[2] = grinder->queue[2]->qr & (qsize - 1);
qr[3] = grinder->queue[3]->qr & (qsize - 1);
qsize = grinder->qsize;
qr[0] = grinder->queue[0]->qr & (qsize - 1);
qr[1] = grinder->queue[1]->qr & (qsize - 1);
qr[2] = grinder->queue[2]->qr & (qsize - 1);
qr[3] = grinder->queue[3]->qr & (qsize - 1);
rte_prefetch0(grinder->qbase[0] + qr[0]);
rte_prefetch0(grinder->qbase[1] + qr[1]);
grinder_wrr_load(port, pos);
grinder_wrr(port, pos);
rte_prefetch0(grinder->qbase[0] + qr[0]);
rte_prefetch0(grinder->qbase[1] + qr[1]);
grinder_wrr_load(port, pos);
grinder_wrr(port, pos);
struct rte_mbuf **qbase = grinder->qbase[qpos];
uint16_t qsize = grinder->qsize;
uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
struct rte_mbuf **qbase = grinder->qbase[qpos];
uint16_t qsize = grinder->qsize;
uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
grinder_handle(struct rte_sched_port *port, uint32_t pos)
{
struct rte_sched_grinder *grinder = port->grinder + pos;
grinder_handle(struct rte_sched_port *port, uint32_t pos)
{
struct rte_sched_grinder *grinder = port->grinder + pos;
switch (grinder->state) {
case e_GRINDER_PREFETCH_PIPE:
{
if (grinder_next_pipe(port, pos)) {
grinder_prefetch_pipe(port, pos);
port->busy_grinders ++;
switch (grinder->state) {
case e_GRINDER_PREFETCH_PIPE:
{
if (grinder_next_pipe(port, pos)) {
grinder_prefetch_pipe(port, pos);
port->busy_grinders ++;
grinder->pipe_params = port->pipe_profiles + pipe->profile;
grinder_prefetch_tc_queue_arrays(port, pos);
grinder_credits_update(port, pos);
grinder->pipe_params = port->pipe_profiles + pipe->profile;
grinder_prefetch_tc_queue_arrays(port, pos);
grinder_credits_update(port, pos);
case e_GRINDER_PREFETCH_MBUF:
{
grinder_prefetch_mbuf(port, pos);
case e_GRINDER_PREFETCH_MBUF:
{
grinder_prefetch_mbuf(port, pos);
/* Look for next packet within the same TC */
if (result && grinder->qmask) {
grinder_wrr(port, pos);
grinder_prefetch_mbuf(port, pos);
/* Look for next packet within the same TC */
if (result && grinder->qmask) {
grinder_wrr(port, pos);
grinder_prefetch_mbuf(port, pos);
/* Look for another active TC within same pipe */
if (grinder_next_tc(port, pos)) {
grinder_prefetch_tc_queue_arrays(port, pos);
/* Look for another active TC within same pipe */
if (grinder_next_tc(port, pos)) {
grinder_prefetch_tc_queue_arrays(port, pos);
if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
port->pipe_loop = grinder->pindex;
}
grinder_evict(port, pos);
if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
port->pipe_loop = grinder->pindex;
}
grinder_evict(port, pos);
/* Look for another active pipe */
if (grinder_next_pipe(port, pos)) {
grinder_prefetch_pipe(port, pos);
/* Look for another active pipe */
if (grinder_next_pipe(port, pos)) {
grinder_prefetch_pipe(port, pos);
rte_sched_port_time_resync(struct rte_sched_port *port)
{
uint64_t cycles = rte_get_tsc_cycles();
uint64_t cycles_diff = cycles - port->time_cpu_cycles;
double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
rte_sched_port_time_resync(struct rte_sched_port *port)
{
uint64_t cycles = rte_get_tsc_cycles();
uint64_t cycles_diff = cycles - port->time_cpu_cycles;
double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
/* Take each queue in the grinder one step further */
for (i = 0, count = 0; ; i ++) {
count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
/* Take each queue in the grinder one step further */
for (i = 0, count = 0; ; i ++) {
count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));