/* Check condition and return an error if true. */
static uint16_t enabled_core_ids[RTE_MAX_LCORE];
-static uint8_t num_cores;
+static unsigned int num_cores;
static uint32_t *keys;
#define TOTAL_ENTRY (1024 * 8)
static int
test_rcu_qsbr_perf(void)
{
- int i, sz;
- int tmp_num_cores;
+ size_t sz;
+ unsigned int i, tmp_num_cores;
writer_done = 0;
/* Wait until all readers have exited */
rte_eal_mp_wait_lcore();
- printf("Total RCU updates = %"PRIi64"\n", rte_atomic64_read(&updates));
- printf("Cycles per %d updates: %"PRIi64"\n", RCU_SCALE_DOWN,
+ printf("Total quiescent state updates = %"PRIi64"\n",
+ rte_atomic64_read(&updates));
+ printf("Cycles per %d quiescent state updates: %"PRIi64"\n",
+ RCU_SCALE_DOWN,
rte_atomic64_read(&update_cycles) /
(rte_atomic64_read(&updates) / RCU_SCALE_DOWN));
printf("Total RCU checks = %"PRIi64"\n", rte_atomic64_read(&checks));
static int
test_rcu_qsbr_rperf(void)
{
- int i, sz;
- int tmp_num_cores;
+ size_t sz;
+ unsigned int i, tmp_num_cores;
rte_atomic64_clear(&updates);
rte_atomic64_clear(&update_cycles);
/* Wait until all readers have exited */
rte_eal_mp_wait_lcore();
- printf("Total RCU updates = %"PRIi64"\n", rte_atomic64_read(&updates));
- printf("Cycles per %d updates: %"PRIi64"\n", RCU_SCALE_DOWN,
+ printf("Total quiescent state updates = %"PRIi64"\n",
+ rte_atomic64_read(&updates));
+ printf("Cycles per %d quiescent state updates: %"PRIi64"\n",
+ RCU_SCALE_DOWN,
rte_atomic64_read(&update_cycles) /
(rte_atomic64_read(&updates) / RCU_SCALE_DOWN));
static int
test_rcu_qsbr_wperf(void)
{
- int i, sz;
+ size_t sz;
+ unsigned int i;
rte_atomic64_clear(&checks);
rte_atomic64_clear(&check_cycles);
test_rcu_qsbr_sw_sv_1qs(void)
{
uint64_t token, begin, cycles;
- int i, j, tmp_num_cores, sz;
+ size_t sz;
+ unsigned int i, j, tmp_num_cores;
int32_t pos;
writer_done = 0;
rte_free(keys);
printf("Following numbers include calls to rte_hash functions\n");
- printf("Cycles per 1 update(online/update/offline): %"PRIi64"\n",
+ printf("Cycles per 1 quiescent state update(online/update/offline): %"PRIi64"\n",
rte_atomic64_read(&update_cycles) /
rte_atomic64_read(&updates));
test_rcu_qsbr_sw_sv_1qs_non_blocking(void)
{
uint64_t token, begin, cycles;
- int i, j, ret, tmp_num_cores, sz;
+ int ret;
+ size_t sz;
+ unsigned int i, j, tmp_num_cores;
int32_t pos;
writer_done = 0;
rte_free(keys);
printf("Following numbers include calls to rte_hash functions\n");
- printf("Cycles per 1 update(online/update/offline): %"PRIi64"\n",
+ printf("Cycles per 1 quiescent state update(online/update/offline): %"PRIi64"\n",
rte_atomic64_read(&update_cycles) /
rte_atomic64_read(&updates));
{
uint16_t core_id;
+ if (rte_lcore_count() < 3) {
+ printf("Not enough cores for rcu_qsbr_perf_autotest, expecting at least 3\n");
+ return TEST_SKIPPED;
+ }
+
rte_atomic64_init(&updates);
rte_atomic64_init(&update_cycles);
rte_atomic64_init(&checks);
}
printf("Number of cores provided = %d\n", num_cores);
- if (num_cores < 2) {
- printf("Test failed! Need 2 or more cores\n");
- goto test_fail;
- }
-
printf("Perf test with all reader threads registered\n");
printf("--------------------------------------------\n");
all_registered = 1;