# Copyright(c) 2017 Intel Corporation.
# Copyright(c) 2017 Cavium, Inc
-arm_force_native_march = false
-
# common flags to all aarch64 builds, with lowest priority
flags_common = [
# Accelerate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
'flags': [
['RTE_MACHINE', '"armv8a"'],
['RTE_USE_C11_MEM_MODEL', true],
- ['RTE_MAX_LCORE', 256]
+ ['RTE_MAX_LCORE', 256],
+ ['RTE_MAX_NUMA_NODES', 4]
],
'part_number_config': {
'generic': {'machine_args': ['-march=armv8-a+crc',
}
part_number_config_arm = {
- 'native': {'machine_args': ['-march=native']},
'0xd03': {'machine_args': ['-mcpu=cortex-a53']},
'0xd04': {'machine_args': ['-mcpu=cortex-a35']},
'0xd07': {'machine_args': ['-mcpu=cortex-a57']},
'flags': [
['RTE_MACHINE', '"neoverse-n1"'],
['RTE_ARM_FEATURE_ATOMICS', true],
- ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
- ['RTE_LIBRTE_VHOST_NUMA', false],
['RTE_MAX_MEM_MB', 1048576],
- ['RTE_MAX_LCORE', 80],
- ['RTE_MAX_NUMA_NODES', 1]
+ ['RTE_MAX_LCORE', 80]
]
},
'0xd49': {
'flags': [
['RTE_MACHINE', '"neoverse-n2"'],
['RTE_ARM_FEATURE_ATOMICS', true],
- ['RTE_EAL_NUMA_AWARE_HUGEPAGES', false],
- ['RTE_LIBRTE_VHOST_NUMA', false],
['RTE_MAX_LCORE', 64]
]
}
['RTE_MACHINE', '"armv8a"'],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_LCORE', 16]
+ ['RTE_MAX_LCORE', 16],
+ ['RTE_MAX_NUMA_NODES', 1]
],
'part_number_config': part_number_config_arm
}
['RTE_MAX_NUMA_NODES', 2]
],
'part_number_config': {
- 'native': {'machine_args': ['-march=native']},
'0xa1': {
'machine_args': ['-mcpu=thunderxt88'],
'flags': flags_part_number_thunderx
['RTE_ARM_FEATURE_ATOMICS', true],
['RTE_USE_C11_MEM_MODEL', true],
['RTE_CACHE_LINE_SIZE', 64],
- ['RTE_MAX_LCORE', 256],
- ['RTE_MAX_NUMA_NODES', 2]
+ ['RTE_MAX_LCORE', 256]
]
},
'0xb2': {
],
'part_number_config': {
'0x0': {'machine_args': ['-march=armv8-a+crc+crypto',
- '-mtune=emag']},
- 'native': {'machine_args': ['-march=native']}
+ '-mtune=emag']}
+ }
+}
+
+implementer_qualcomm = {
+ 'description': 'Qualcomm',
+ 'flags': [
+ ['RTE_MACHINE', '"armv8a"'],
+ ['RTE_USE_C11_MEM_MODEL', true],
+ ['RTE_CACHE_LINE_SIZE', 64],
+ ['RTE_MAX_LCORE', 64],
+ ['RTE_MAX_NUMA_NODES', 1]
+ ],
+ 'part_number_config': {
+ '0xc00': {'machine_args': ['-march=armv8-a+crc']}
}
}
'0x41': implementer_arm,
'0x43': implementer_cavium,
'0x50': implementer_ampere,
+ '0x51': implementer_qualcomm,
'0x56': implementer_marvell,
'dpaa': implementer_dpaa
}
machine_args += '-mfpu=neon'
else
# aarch64 build
- if machine == 'default' and not meson.is_cross_build()
- # default build
- implementer_id = 'generic'
- part_number = 'generic'
- elif not meson.is_cross_build()
- # native build
- # The script returns ['Implementer', 'Variant', 'Architecture',
- # 'Primary Part number', 'Revision']
- detect_vendor = find_program(join_paths(
- meson.current_source_dir(), 'armv8_machine.py'))
- cmd = run_command(detect_vendor.path())
- if cmd.returncode() == 0
- cmd_output = cmd.stdout().to_lower().strip().split(' ')
- implementer_id = cmd_output[0]
- part_number = cmd_output[3]
+ if not meson.is_cross_build()
+ if machine == 'default'
+ # default build
+ implementer_id = 'generic'
+ part_number = 'generic'
else
- error('Error when getting Arm Implementer ID and part number.')
- endif
- if arm_force_native_march == true
- part_number = 'native'
+ # native build
+ # The script returns ['Implementer', 'Variant', 'Architecture',
+ # 'Primary Part number', 'Revision']
+ detect_vendor = find_program(join_paths(
+ meson.current_source_dir(), 'armv8_machine.py'))
+ cmd = run_command(detect_vendor.path())
+ if cmd.returncode() == 0
+ cmd_output = cmd.stdout().to_lower().strip().split(' ')
+ implementer_id = cmd_output[0]
+ part_number = cmd_output[3]
+ else
+ error('Error when getting Arm Implementer ID and part number.')
+ endif
endif
else
# cross build