sched: remove vector functions
[dpdk.git] / config / arm / meson.build
index 34ad95c..8aead74 100644 (file)
@@ -17,7 +17,6 @@ flags_common = [
         #    ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
         #    ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
 
-        ['RTE_SCHED_VECTOR', false],
         ['RTE_ARM_USE_WFE', false],
         ['RTE_ARCH_ARM64', true],
         ['RTE_CACHE_LINE_SIZE', 128]
@@ -38,14 +37,18 @@ implementer_generic = {
     ],
     'part_number_config': {
         'generic': {
-            'machine_args': ['-march=armv8-a+crc', '-moutline-atomics']
+            'march': 'armv8-a',
+            'march_features': ['crc'],
+            'compiler_options': ['-moutline-atomics']
         },
         'generic_aarch32': {
-            'machine_args': ['-march=armv8-a', '-mfpu=neon'],
+            'march': 'armv8-a',
+            'compiler_options': ['-mfpu=neon'],
             'flags': [
                 ['RTE_ARCH_ARM_NEON_MEMCPY', false],
                 ['RTE_ARCH_STRICT_ALIGN', true],
                 ['RTE_ARCH_ARMv8_AARCH32', true],
+                ['RTE_ARCH', 'armv8_aarch32'],
                 ['RTE_CACHE_LINE_SIZE', 64]
             ]
         }
@@ -53,15 +56,17 @@ implementer_generic = {
 }
 
 part_number_config_arm = {
-    '0xd03': {'machine_args':  ['-mcpu=cortex-a53']},
-    '0xd04': {'machine_args':  ['-mcpu=cortex-a35']},
-    '0xd07': {'machine_args':  ['-mcpu=cortex-a57']},
-    '0xd08': {'machine_args':  ['-mcpu=cortex-a72']},
-    '0xd09': {'machine_args':  ['-mcpu=cortex-a73']},
-    '0xd0a': {'machine_args':  ['-mcpu=cortex-a75']},
-    '0xd0b': {'machine_args':  ['-mcpu=cortex-a76']},
+    '0xd03': {'compiler_options':  ['-mcpu=cortex-a53']},
+    '0xd04': {'compiler_options':  ['-mcpu=cortex-a35']},
+    '0xd07': {'compiler_options':  ['-mcpu=cortex-a57']},
+    '0xd08': {'compiler_options':  ['-mcpu=cortex-a72']},
+    '0xd09': {'compiler_options':  ['-mcpu=cortex-a73']},
+    '0xd0a': {'compiler_options':  ['-mcpu=cortex-a75']},
+    '0xd0b': {'compiler_options':  ['-mcpu=cortex-a76']},
     '0xd0c': {
-        'machine_args':  ['-march=armv8.2-a+crypto', '-mcpu=neoverse-n1'],
+        'march': 'armv8.2-a',
+        'march_features': ['crypto'],
+        'compiler_options':  ['-mcpu=neoverse-n1'],
         'flags': [
             ['RTE_MACHINE', '"neoverse-n1"'],
             ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -71,7 +76,8 @@ part_number_config_arm = {
         ]
     },
     '0xd49': {
-        'machine_args':  ['-march=armv8.5-a+crypto+sve2'],
+        'march': 'armv8.5-a',
+        'march_features': ['sve2'],
         'flags': [
             ['RTE_MACHINE', '"neoverse-n2"'],
             ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -105,19 +111,21 @@ implementer_cavium = {
     ],
     'part_number_config': {
         '0xa1': {
-            'machine_args': ['-mcpu=thunderxt88'],
+            'compiler_options': ['-mcpu=thunderxt88'],
             'flags': flags_part_number_thunderx
         },
         '0xa2': {
-            'machine_args': ['-mcpu=thunderxt81'],
+            'compiler_options': ['-mcpu=thunderxt81'],
             'flags': flags_part_number_thunderx
         },
         '0xa3': {
-            'machine_args': ['-mcpu=thunderxt83'],
+            'compiler_options': ['-mcpu=thunderxt83'],
             'flags': flags_part_number_thunderx
         },
         '0xaf': {
-            'machine_args': ['-march=armv8.1-a+crc+crypto', '-mcpu=thunderx2t99'],
+            'march': 'armv8.1-a',
+            'march_features': ['crc', 'crypto'],
+            'compiler_options': ['-mcpu=thunderx2t99'],
             'flags': [
                 ['RTE_MACHINE', '"thunderx2"'],
                 ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -127,9 +135,11 @@ implementer_cavium = {
             ]
         },
         '0xb2': {
-            'machine_args': ['-march=armv8.2-a+crc+crypto+lse', '-mcpu=octeontx2'],
+            'march': 'armv8.2-a',
+            'march_features': ['crc', 'crypto', 'lse'],
+            'compiler_options': ['-mcpu=octeontx2'],
             'flags': [
-                ['RTE_MACHINE', '"octeontx2"'],
+                ['RTE_MACHINE', '"cn9k"'],
                 ['RTE_ARM_FEATURE_ATOMICS', true],
                 ['RTE_USE_C11_MEM_MODEL', true],
                 ['RTE_MAX_LCORE', 36],
@@ -148,7 +158,11 @@ implementer_ampere = {
         ['RTE_MAX_NUMA_NODES', 1]
     ],
     'part_number_config': {
-        '0x0': {'machine_args':  ['-march=armv8-a+crc+crypto', '-mtune=emag']}
+        '0x0': {
+            'march': 'armv8-a',
+            'march_features': ['crc', 'crypto'],
+            'compiler_options':  ['-mtune=emag']
+        }
     }
 }
 
@@ -160,7 +174,9 @@ implementer_hisilicon = {
     ],
     'part_number_config': {
         '0xd01': {
-            'machine_args': ['-march=armv8.2-a+crypto', '-mtune=tsv110'],
+            'march': 'armv8.2-a',
+            'march_features': ['crypto'],
+            'compiler_options': ['-mtune=tsv110'],
             'flags': [
                 ['RTE_MACHINE', '"Kunpeng 920"'],
                 ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -169,7 +185,8 @@ implementer_hisilicon = {
             ]
         },
         '0xd02': {
-            'machine_args': ['-march=armv8.2-a+crypto+sve'],
+            'march': 'armv8.2-a',
+            'march_features': ['crypto', 'sve'],
             'flags': [
                 ['RTE_MACHINE', '"Kunpeng 930"'],
                 ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -190,8 +207,14 @@ implementer_qualcomm = {
         ['RTE_MAX_NUMA_NODES', 1]
     ],
     'part_number_config': {
-        '0x800': {'machine_args':  ['-march=armv8-a+crc']},
-        '0xc00': {'machine_args':  ['-march=armv8-a+crc']},
+        '0x800': {
+            'march': 'armv8-a',
+            'march_features': ['crc']
+        },
+        '0xc00': {
+            'march': 'armv8-a',
+            'march_features': ['crc']
+        }
     }
 }
 
@@ -253,9 +276,11 @@ soc_cn10k = {
     'implementer' : '0x41',
     'flags': [
         ['RTE_MAX_LCORE', 24],
-        ['RTE_MAX_NUMA_NODES', 1]
+        ['RTE_MAX_NUMA_NODES', 1],
+        ['RTE_MEMPOOL_ALIGN', 128]
     ],
     'part_number': '0xd49',
+    'extra_march_features': ['crypto'],
     'numa': false
 }
 
@@ -316,8 +341,8 @@ soc_n2 = {
     'numa': false
 }
 
-soc_octeontx2 = {
-    'description': 'Marvell OCTEON TX2',
+soc_cn9k = {
+    'description': 'Marvell OCTEON 9',
     'implementer': '0x43',
     'part_number': '0xb2',
     'numa': false
@@ -353,6 +378,7 @@ generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
 armada:          Marvell ARMADA
 bluefield:       NVIDIA BlueField
 centriq2400:     Qualcomm Centriq 2400
+cn9k:            Marvell OCTEON 9
 cn10k:           Marvell OCTEON 10
 dpaa:            NXP DPAA
 emag:            Ampere eMAG
@@ -361,7 +387,6 @@ kunpeng920:      HiSilicon Kunpeng 920
 kunpeng930:      HiSilicon Kunpeng 930
 n1sdp:           Arm Neoverse N1SDP
 n2:              Arm Neoverse N2
-octeontx2:       Marvell OCTEON TX2
 stingray:        Broadcom Stingray
 thunderx2:       Marvell ThunderX2 T99
 thunderxt88:     Marvell ThunderX T88
@@ -375,6 +400,7 @@ socs = {
     'armada': soc_armada,
     'bluefield': soc_bluefield,
     'centriq2400': soc_centriq2400,
+    'cn9k': soc_cn9k,
     'cn10k' : soc_cn10k,
     'dpaa': soc_dpaa,
     'emag': soc_emag,
@@ -383,7 +409,6 @@ socs = {
     'kunpeng930': soc_kunpeng930,
     'n1sdp': soc_n1sdp,
     'n2': soc_n2,
-    'octeontx2': soc_octeontx2,
     'stingray': soc_stingray,
     'thunderx2': soc_thunderx2,
     'thunderxt88': soc_thunderxt88
@@ -408,11 +433,15 @@ if dpdk_conf.get('RTE_ARCH_32')
     else
         # armv7 build
         dpdk_conf.set('RTE_ARCH_ARMv7', true)
+        dpdk_conf.set('RTE_ARCH', 'armv7')
+        dpdk_conf.set('RTE_MAX_LCORE', 128)
+        dpdk_conf.set('RTE_MAX_NUMA_NODES', 1)
         # the minimum architecture supported, armv7-a, needs the following,
         machine_args += '-mfpu=neon'
     endif
 else
     # armv8 build
+    dpdk_conf.set('RTE_ARCH', 'armv8')
     update_flags = true
     soc_config = {}
     if not meson.is_cross_build()
@@ -436,7 +465,7 @@ else
             # 'Primary Part number', 'Revision']
             detect_vendor = find_program(join_paths(meson.current_source_dir(),
                                                     'armv8_machine.py'))
-            cmd = run_command(detect_vendor.path())
+            cmd = run_command(detect_vendor.path(), check: false)
             if cmd.returncode() == 0
                 cmd_output = cmd.stdout().to_lower().strip().split(' ')
                 implementer_id = cmd_output[0]
@@ -500,13 +529,65 @@ if update_flags
     # add/overwrite flags in the proper order
     dpdk_flags = flags_common + implementer_config['flags'] + part_number_config.get('flags', []) + soc_flags
 
-    # apply supported machine args
     machine_args = [] # Clear previous machine args
-    foreach flag: part_number_config['machine_args']
-        if cc.has_argument(flag)
-            machine_args += flag
+
+    # probe supported archs and their features
+    candidate_march = ''
+    if part_number_config.has_key('march')
+        supported_marchs = ['armv8.6-a', 'armv8.5-a', 'armv8.4-a', 'armv8.3-a',
+                            'armv8.2-a', 'armv8.1-a', 'armv8-a']
+        check_compiler_support = false
+        foreach supported_march: supported_marchs
+            if supported_march == part_number_config['march']
+                # start checking from this version downwards
+                check_compiler_support = true
+            endif
+            if (check_compiler_support and
+                cc.has_argument('-march=' + supported_march))
+                candidate_march = supported_march
+                # highest supported march version found
+                break
+            endif
+        endforeach
+        if candidate_march == ''
+            error('No suitable armv8 march version found.')
         endif
-    endforeach
+        if candidate_march != part_number_config['march']
+            warning('Configuration march version is ' +
+                    '@0@, but the compiler supports only @1@.'
+                    .format(part_number_config['march'], candidate_march))
+        endif
+        candidate_march = '-march=' + candidate_march
+
+        march_features = []
+        if part_number_config.has_key('march_features')
+            march_features += part_number_config['march_features']
+        endif
+        if soc_config.has_key('extra_march_features')
+            march_features += soc_config['extra_march_features']
+        endif
+        foreach feature: march_features
+            if cc.has_argument('+'.join([candidate_march, feature]))
+                candidate_march = '+'.join([candidate_march, feature])
+            else
+                warning('The compiler does not support feature @0@'
+                    .format(feature))
+            endif
+        endforeach
+        machine_args += candidate_march
+    endif
+
+    # apply supported compiler options
+    if part_number_config.has_key('compiler_options')
+        foreach flag: part_number_config['compiler_options']
+            if cc.has_argument(flag)
+                machine_args += flag
+            else
+                warning('Configuration compiler option ' +
+                        '@0@ isn\'t supported.'.format(flag))
+            endif
+        endforeach
+    endif
 
     # apply flags
     foreach flag: dpdk_flags
@@ -524,6 +605,9 @@ endif
 
 if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
     compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
+    if (cc.check_header('arm_sve.h'))
+        dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)
+    endif
 endif
 
 if cc.get_define('__ARM_FEATURE_CRC32', args: machine_args) != ''