eal/ppc: fix compilation for musl

[dpdk.git] / config / arm / meson.build

diff --git a/config/arm/meson.build b/config/arm/meson.build
index 9bdf4bc..aa12eb7 100644 (file)
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -17,7 +17,6 @@ flags_common = [
         #    ['RTE_ARM64_MEMCPY_ALIGN_MASK', 0xF],
         #    ['RTE_ARM64_MEMCPY_STRICT_ALIGN', false],
 
-        ['RTE_SCHED_VECTOR', false],
         ['RTE_ARM_USE_WFE', false],
         ['RTE_ARCH_ARM64', true],
         ['RTE_CACHE_LINE_SIZE', 128]
@@ -43,11 +42,13 @@ implementer_generic = {
             'compiler_options': ['-moutline-atomics']
         },
         'generic_aarch32': {
-            'machine_args': ['-march=armv8-a', '-mfpu=neon'],
+            'march': 'armv8-a',
+            'compiler_options': ['-mfpu=neon'],
             'flags': [
                 ['RTE_ARCH_ARM_NEON_MEMCPY', false],
                 ['RTE_ARCH_STRICT_ALIGN', true],
                 ['RTE_ARCH_ARMv8_AARCH32', true],
+                ['RTE_ARCH', 'armv8_aarch32'],
                 ['RTE_CACHE_LINE_SIZE', 64]
             ]
         }
@@ -76,7 +77,7 @@ part_number_config_arm = {
     },
     '0xd49': {
         'march': 'armv8.5-a',
-        'march_features': ['crypto', 'sve2'],
+        'march_features': ['sve2'],
         'flags': [
             ['RTE_MACHINE', '"neoverse-n2"'],
             ['RTE_ARM_FEATURE_ATOMICS', true],
@@ -118,7 +119,7 @@ implementer_cavium = {
             'flags': flags_part_number_thunderx
         },
         '0xa3': {
-            'compiler_options': ['-mcpu=thunderxt83'],
+            'compiler_options': ['-march=armv8-a+crc', '-mcpu=thunderxt83'],
             'flags': flags_part_number_thunderx
         },
         '0xaf': {
@@ -138,7 +139,7 @@ implementer_cavium = {
             'march_features': ['crc', 'crypto', 'lse'],
             'compiler_options': ['-mcpu=octeontx2'],
             'flags': [
-                ['RTE_MACHINE', '"octeontx2"'],
+                ['RTE_MACHINE', '"cn9k"'],
                 ['RTE_ARM_FEATURE_ATOMICS', true],
                 ['RTE_USE_C11_MEM_MODEL', true],
                 ['RTE_MAX_LCORE', 36],
@@ -275,10 +276,13 @@ soc_cn10k = {
     'implementer' : '0x41',
     'flags': [
         ['RTE_MAX_LCORE', 24],
-        ['RTE_MAX_NUMA_NODES', 1]
+        ['RTE_MAX_NUMA_NODES', 1],
+        ['RTE_MEMPOOL_ALIGN', 128]
     ],
     'part_number': '0xd49',
-    'numa': false
+    'extra_march_features': ['crypto'],
+    'numa': false,
+    'sve_acle': false
 }
 
 soc_dpaa = {
@@ -338,8 +342,8 @@ soc_n2 = {
     'numa': false
 }
 
-soc_octeontx2 = {
-    'description': 'Marvell OCTEON TX2',
+soc_cn9k = {
+    'description': 'Marvell OCTEON 9',
     'implementer': '0x43',
     'part_number': '0xb2',
     'numa': false
@@ -368,6 +372,12 @@ soc_thunderxt88 = {
     'part_number': '0xa1'
 }
 
+soc_thunderxt83 = {
+    'description': 'Marvell ThunderX T83',
+    'implementer': '0x43',
+    'part_number': '0xa3'
+}
+
 '''
 Start of SoCs list
 generic:         Generic un-optimized build for armv8 aarch64 execution mode.
@@ -375,6 +385,7 @@ generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
 armada:          Marvell ARMADA
 bluefield:       NVIDIA BlueField
 centriq2400:     Qualcomm Centriq 2400
+cn9k:            Marvell OCTEON 9
 cn10k:           Marvell OCTEON 10
 dpaa:            NXP DPAA
 emag:            Ampere eMAG
@@ -383,10 +394,10 @@ kunpeng920:      HiSilicon Kunpeng 920
 kunpeng930:      HiSilicon Kunpeng 930
 n1sdp:           Arm Neoverse N1SDP
 n2:              Arm Neoverse N2
-octeontx2:       Marvell OCTEON TX2
 stingray:        Broadcom Stingray
 thunderx2:       Marvell ThunderX2 T99
 thunderxt88:     Marvell ThunderX T88
+thunderxt83:     Marvell ThunderX T83
 End of SoCs list
 '''
 # The string above is included in the documentation, keep it in sync with the
@@ -397,6 +408,7 @@ socs = {
     'armada': soc_armada,
     'bluefield': soc_bluefield,
     'centriq2400': soc_centriq2400,
+    'cn9k': soc_cn9k,
     'cn10k' : soc_cn10k,
     'dpaa': soc_dpaa,
     'emag': soc_emag,
@@ -405,10 +417,10 @@ socs = {
     'kunpeng930': soc_kunpeng930,
     'n1sdp': soc_n1sdp,
     'n2': soc_n2,
-    'octeontx2': soc_octeontx2,
     'stingray': soc_stingray,
     'thunderx2': soc_thunderx2,
-    'thunderxt88': soc_thunderxt88
+    'thunderxt88': soc_thunderxt88,
+    'thunderxt83': soc_thunderxt83,
 }
 
 dpdk_conf.set('RTE_ARCH_ARM', 1)
@@ -430,11 +442,15 @@ if dpdk_conf.get('RTE_ARCH_32')
     else
         # armv7 build
         dpdk_conf.set('RTE_ARCH_ARMv7', true)
+        dpdk_conf.set('RTE_ARCH', 'armv7')
+        dpdk_conf.set('RTE_MAX_LCORE', 128)
+        dpdk_conf.set('RTE_MAX_NUMA_NODES', 1)
         # the minimum architecture supported, armv7-a, needs the following,
         machine_args += '-mfpu=neon'
     endif
 else
     # armv8 build
+    dpdk_conf.set('RTE_ARCH', 'armv8')
     update_flags = true
     soc_config = {}
     if not meson.is_cross_build()
@@ -458,7 +474,7 @@ else
             # 'Primary Part number', 'Revision']
             detect_vendor = find_program(join_paths(meson.current_source_dir(),
                                                     'armv8_machine.py'))
-            cmd = run_command(detect_vendor.path())
+            cmd = run_command(detect_vendor.path(), check: false)
             if cmd.returncode() == 0
                 cmd_output = cmd.stdout().to_lower().strip().split(' ')
                 implementer_id = cmd_output[0]
@@ -598,7 +614,7 @@ endif
 
 if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''
     compile_time_cpuflags += ['RTE_CPUFLAG_SVE']
-    if (cc.check_header('arm_sve.h'))
+    if (cc.check_header('arm_sve.h') and soc_config.get('sve_acle', true))
         dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)
     endif
 endif