#
CONFIG_RTE_ARCH_STRICT_ALIGN=n
+#
+# Enable link time optimization
+#
+CONFIG_RTE_ENABLE_LTO=n
+
#
# Compile to share library
#
#
CONFIG_RTE_NEXT_ABI=y
-#
-# Major ABI to overwrite library specific LIBABIVER
-#
-CONFIG_RTE_MAJOR_ABI=
-
#
# Machine's cache line size
#
CONFIG_RTE_MAX_TAILQ=32
CONFIG_RTE_ENABLE_ASSERT=n
CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO
+CONFIG_RTE_ENABLE_TRACE_FP=n
CONFIG_RTE_LOG_HISTORY=256
CONFIG_RTE_BACKTRACE=y
CONFIG_RTE_LIBEAL_USE_HPET=n
-CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n
CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n
CONFIG_RTE_EAL_IGB_UIO=n
CONFIG_RTE_EAL_VFIO=n
CONFIG_RTE_MALLOC_DEBUG=n
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
CONFIG_RTE_USE_LIBBSD=n
+# Use WFE instructions to implement the rte_wait_for_equal_xxx APIs,
+# calling these APIs put the cores in low power state while waiting
+# for the memory address to become equal to the expected value.
+# This is supported only by aarch64.
+CONFIG_RTE_ARM_USE_WFE=n
#
# Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing.
CONFIG_RTE_ENABLE_AVX=y
CONFIG_RTE_ENABLE_AVX512=n
+# Use ARM LSE ATOMIC instructions
+CONFIG_RTE_ARM_FEATURE_ATOMICS=n
+
# Default driver path (or "" to disable)
CONFIG_RTE_EAL_PMD_PATH=""
# Compile burst-oriented Chelsio Terminator (CXGBE) PMD
#
CONFIG_RTE_LIBRTE_CXGBE_PMD=y
-CONFIG_RTE_LIBRTE_CXGBE_TPUT=y
+
+#
+# Compile burst-oriented NXP PFE PMD driver
+#
+CONFIG_RTE_LIBRTE_PFE_PMD=n
# NXP DPAA Bus
CONFIG_RTE_LIBRTE_DPAA_BUS=n
#
CONFIG_RTE_LIBRTE_HNS3_PMD=n
+#
+# Compile Pensando IONIC PMD driver
+#
+CONFIG_RTE_LIBRTE_IONIC_PMD=y
+
#
# Compile burst-oriented IXGBE PMD driver
#
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n
-CONFIG_RTE_IXGBE_INC_VECTOR=y
CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n
#
CONFIG_RTE_LIBRTE_ICE_DEBUG_RX=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n
CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n
-CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC=y
CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n
# Compile burst-oriented IAVF PMD driver
#
CONFIG_RTE_LIBRTE_IAVF_PMD=y
-CONFIG_RTE_LIBRTE_IAVF_INC_VECTOR=y
CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n
CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n
#
# Compile burst-oriented IPN3KE PMD driver
#
-CONFIG_RTE_LIBRTE_IPN3KE_PMD=y
+CONFIG_RTE_LIBRTE_IPN3KE_PMD=n
+
+#
+# Compile burst-oriented IGC PMD drivers
+#
+CONFIG_RTE_LIBRTE_IGC_PMD=y
+CONFIG_RTE_LIBRTE_IGC_DEBUG_RX=n
+CONFIG_RTE_LIBRTE_IGC_DEBUG_TX=n
#
# Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD
#
# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5,
-# ConnectX-6 & Bluefield (MLX5) PMD
+# ConnectX-6 & BlueField (MLX5) PMD
#
CONFIG_RTE_LIBRTE_MLX5_PMD=n
CONFIG_RTE_LIBRTE_MLX5_DEBUG=n
+#
+# Compile vdpa-oriented Mellanox ConnectX-6 & BlueField (MLX5) PMD
+#
+CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD=n
+
# Linking method for mlx4/5 dependency on ibverbs and related libraries
# Default linking is dynamic by linker.
# Other options are: dynamic by dlopen at run-time, or statically embedded.
#
CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC=y
+#
+# Compile PMD for Intel FPGA 5GNR FEC bbdev device
+#
+CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC=y
+
#
# Compile generic crypto device library
#
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y
+#
+# Compile PMD for Marvell OCTEON TX2 crypto device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=y
+
#
# Compile PMD for QuickAssist based devices - see docs for details
#
#
# Compile PMD for Intel FPGA raw device
#
-CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y
+CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n
#
# Compile PMD for Intel IOAT raw device
#
CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=y
+#
+# Compile PMD for octeontx2 EP raw device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV=y
+
#
# Compile PMD for NTB raw device
#
CONFIG_RTE_LIBRTE_LATENCY_STATS=y
#
-# Compile librte_telemetry
+# Compile librte_telemetry legacy support
#
CONFIG_RTE_LIBRTE_TELEMETRY=n
CONFIG_RTE_LIBRTE_RCU=y
CONFIG_RTE_LIBRTE_RCU_DEBUG=n
+#
+# Compile librte_rib
+#
+CONFIG_RTE_LIBRTE_RIB=y
+
+#
+# Compile librte_fib
+#
+CONFIG_RTE_LIBRTE_FIB=y
+CONFIG_RTE_LIBRTE_FIB_DEBUG=n
+
#
# Compile librte_lpm
#
#
CONFIG_RTE_LIBRTE_IPSEC=y
+#
+# Compile librte_graph
+#
+CONFIG_RTE_LIBRTE_GRAPH=y
+CONFIG_RTE_GRAPH_BURST_SIZE=256
+CONFIG_RTE_LIBRTE_GRAPH_STATS=y
+
+#
+# Compile librte_node
+#
+CONFIG_RTE_LIBRTE_NODE=y
+
#
# Compile the test application
#
CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n
CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n
+#
+# Compile the rte flow perf application
+#
+CONFIG_RTE_TEST_FLOW_PERF=y
+
#
# Compile the bbdev test application
#