-/*
- * BSD LICENSE
- *
- * Copyright(c) 2017 Intel Corporation.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of Intel Corporation nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2017 Intel Corporation
*/
/**
#define RTE_MAX_MEMSEG 512
#define RTE_MAX_MEMZONE 2560
#define RTE_MAX_TAILQ 32
-#define RTE_LOG_LEVEL RTE_LOG_INFO
#define RTE_LOG_DP_LEVEL RTE_LOG_INFO
#define RTE_BACKTRACE 1
#define RTE_EAL_VFIO 1
+/* bsd module defines */
+#define RTE_CONTIGMEM_MAX_NUM_BUFS 64
+#define RTE_CONTIGMEM_DEFAULT_NUM_BUFS 1
+#define RTE_CONTIGMEM_DEFAULT_BUF_SIZE (512*1024*1024)
+
/* mempool defines */
#define RTE_MEMPOOL_CACHE_MAX_SIZE 512
/*
* Number of sessions to create in the session memory pool
- * on a single QuickAssist device.
+ * on a single instance of crypto HW device.
*/
+/* QuickAssist device */
#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048
+/* DPAA2_SEC */
+#define RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS 2048
+
+/* DPAA_SEC */
+#define RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS 2048
+
+/* DPAA SEC max cryptodev devices*/
+#define RTE_LIBRTE_DPAA_MAX_CRYPTODEV 4
+
+/* fm10k defines */
+#define RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE 1
+
+/* i40e defines */
+#define RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC 1
+#undef RTE_LIBRTE_I40E_16BYTE_RX_DESC
+#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64
+#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4
+#define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4
+/* interval up to 8160 us, aligned to 2 (or default value) */
+#define RTE_LIBRTE_I40E_ITR_INTERVAL -1
+
/* Ring net PMD settings */
#define RTE_PMD_RING_MAX_RX_RINGS 16
#define RTE_PMD_RING_MAX_TX_RINGS 16