net/txgbe: add L2 tunnel filter init and uninit

[dpdk.git] / config / x86 / meson.build

diff --git a/config/x86/meson.build b/config/x86/meson.build
index a650a1c..31bfa63 100644 (file)
--- a/config/x86/meson.build
+++ b/config/x86/meson.build
@@ -1,41 +1,47 @@
 # SPDX-License-Identifier: BSD-3-Clause
-# Copyright(c) 2017-2019 Intel Corporation
+# Copyright(c) 2017-2020 Intel Corporation
 
 # get binutils version for the workaround of Bug 97
 if not is_windows
-       ldver = run_command('ld', '-v').stdout().strip()
-       if ldver.contains('2.30') and cc.has_argument('-mno-avx512f')
+       binutils_ok = run_command(binutils_avx512_check)
+       if binutils_ok.returncode() != 0 and cc.has_argument('-mno-avx512f')
                machine_args += '-mno-avx512f'
-               message('Binutils 2.30 detected, disabling AVX512 support as workaround for bug #97')
-       endif
-       if ldver.contains('2.31') and cc.has_argument('-mno-avx512f')
-               machine_args += '-mno-avx512f'
-               message('Binutils 2.31 detected, disabling AVX512 support as workaround for bug #249')
+               warning('Binutils error with AVX512 assembly, disabling AVX512 support')
        endif
 endif
 
 # we require SSE4.2 for DPDK
-sse_errormsg = '''SSE4.2 instruction set is required for DPDK.
-Please set the machine type to "nehalem" or "corei7" or higher value'''
-
 if cc.get_define('__SSE4_2__', args: machine_args) == ''
-       error(sse_errormsg)
+       message('SSE 4.2 not enabled by default, explicitly enabling')
+       machine_args += '-msse4'
 endif
 
 base_flags = ['SSE', 'SSE2', 'SSE3','SSSE3', 'SSE4_1', 'SSE4_2']
 foreach f:base_flags
-       dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1)
        compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
 endforeach
 
-optional_flags = ['AES', 'PCLMUL',
-               'AVX', 'AVX2', 'AVX512F']
+optional_flags = [
+       'AES',
+       'AVX',
+       'AVX2',
+       'AVX512BW',
+       'AVX512CD',
+       'AVX512DQ',
+       'AVX512F',
+       'AVX512VL',
+       'PCLMUL',
+       'RDRND',
+       'RDSEED',
+       'VPCLMULQDQ',
+]
 foreach f:optional_flags
        if cc.get_define('__@0@__'.format(f), args: machine_args) == '1'
                if f == 'PCLMUL' # special case flags with different defines
                        f = 'PCLMULQDQ'
+               elif f == 'RDRND'
+                       f = 'RDRAND'
                endif
-               dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1)
                compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
        endif
 endforeach