Installation
------------
-Section 3 of the DPDK manual provides instuctions on installing and compiling DPDK. The
-default set of bbdev compile flags may be found in config/common_base, where for example
-the flag to build the FPGA 5GNR FEC device, ``CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC``,
-is already set. It is assumed DPDK has been compiled using for instance:
-
-.. code-block:: console
-
- make install T=x86_64-native-linuxapp-gcc
-
+Section 3 of the DPDK manual provides instructions on installing and compiling DPDK.
DPDK requires hugepages to be configured as detailed in section 2 of the DPDK manual.
The bbdev test application has been tested with a configuration 40 x 1GB hugepages. The
.. code-block:: console
- cd <dpdk-top-level-directory>
- insmod ./build/kmod/igb_uio.ko
+ insmod igb_uio.ko
echo "8086 0d8f" > /sys/bus/pci/drivers/igb_uio/new_id
lspci -vd8086:0d8f
device to perform FEC functions.
This configuration needs to be executed at least once after reboot or PCI FLR and can
-be achieved by using the function ``fpga_5gnr_fec_configure()``, which sets up the
-parameters defined in ``fpga_5gnr_fec_conf`` structure:
+be achieved by using the function ``rte_fpga_5gnr_fec_configure()``, which sets up the
+parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
.. code-block:: c
- struct fpga_5gnr_fec_conf {
+ struct rte_fpga_5gnr_fec_conf {
bool pf_mode_en;
uint8_t vf_ul_queues_number[FPGA_5GNR_FEC_NUM_VFS];
uint8_t vf_dl_queues_number[FPGA_5GNR_FEC_NUM_VFS];
the FLR time out then set this setting to 0x262=610.
-An example configuration code calling the function ``fpga_5gnr_fec_configure()`` is shown
+An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown
below:
.. code-block:: c
- struct fpga_5gnr_fec_conf conf;
+ struct rte_fpga_5gnr_fec_conf conf;
unsigned int i;
- memset(&conf, 0, sizeof(struct fpga_5gnr_fec_conf));
+ memset(&conf, 0, sizeof(struct rte_fpga_5gnr_fec_conf));
conf.pf_mode_en = 1;
for (i = 0; i < FPGA_5GNR_FEC_NUM_VFS; ++i) {
conf.ul_load_balance = 64;
/* setup FPGA PF */
- ret = fpga_5gnr_fec_configure(info->dev_name, &conf);
+ ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf);
TEST_ASSERT_SUCCESS(ret,
"Failed to configure 4G FPGA PF for bbdev %s",
info->dev_name);