doc: clarify PMD order in release notes

[dpdk.git] / doc / guides / bbdevs / fpga_5gnr_fec.rst

diff --git a/doc/guides/bbdevs/fpga_5gnr_fec.rst b/doc/guides/bbdevs/fpga_5gnr_fec.rst
index 709e7ba..9d71585 100644 (file)
--- a/doc/guides/bbdevs/fpga_5gnr_fec.rst
+++ b/doc/guides/bbdevs/fpga_5gnr_fec.rst
@@ -51,10 +51,7 @@ FPGA 5GNR FEC does not support the following:
 Installation
 ------------
 
-Section 3 of the DPDK manual provides instructions on installing and compiling DPDK. The
-default set of bbdev compile flags may be found in config/common_base, where for example
-the flag to build the FPGA 5GNR FEC device, ``CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC``,
-is already set.
+Section 3 of the DPDK manual provides instructions on installing and compiling DPDK.
 
 DPDK requires hugepages to be configured as detailed in section 2 of the DPDK manual.
 The bbdev test application has been tested with a configuration 40 x 1GB hugepages. The
@@ -85,7 +82,7 @@ Bind PF UIO driver(s)
 Install the DPDK igb_uio driver, bind it with the PF PCI device ID and use
 ``lspci`` to confirm the PF device is under use by ``igb_uio`` DPDK UIO driver.
 
-The igb_uio driver may be bound to the PF PCI device using one of three methods:
+The igb_uio driver may be bound to the PF PCI device using one of two methods:
 
 
 1. PCI functions (physical or virtual, depending on the use case) can be bound to
@@ -108,20 +105,6 @@ the UIO driver by repeating this command for every function.
 where the PCI device ID (example: 0000:06:00.0) is obtained using lspci -vd8086:0d8f
 
 
-3. A third way to bind is to use ``dpdk-setup.sh`` tool
-
-.. code-block:: console
-
-  cd <dpdk-top-level-directory>
-  ./usertools/dpdk-setup.sh
-
-  select 'Bind Ethernet/Crypto/Baseband device to IGB UIO module'
-  or
-  select 'Bind Ethernet/Crypto/Baseband device to VFIO module' depending on driver required
-  enter PCI device ID
-  select 'Display current Ethernet/Crypto/Baseband device settings' to confirm binding
-
-
 In the same way the FPGA 5GNR FEC PF can be bound with vfio, but vfio driver does not
 support SR-IOV configuration right out of the box, so it will need to be patched.
 
@@ -169,12 +152,12 @@ queues, priorities, load balance, bandwidth and other settings necessary for the
 device to perform FEC functions.
 
 This configuration needs to be executed at least once after reboot or PCI FLR and can
-be achieved by using the function ``fpga_5gnr_fec_configure()``, which sets up the
-parameters defined in ``fpga_5gnr_fec_conf`` structure:
+be achieved by using the function ``rte_fpga_5gnr_fec_configure()``, which sets up the
+parameters defined in ``rte_fpga_5gnr_fec_conf`` structure:
 
 .. code-block:: c
 
-  struct fpga_5gnr_fec_conf {
+  struct rte_fpga_5gnr_fec_conf {
       bool pf_mode_en;
       uint8_t vf_ul_queues_number[FPGA_5GNR_FEC_NUM_VFS];
       uint8_t vf_dl_queues_number[FPGA_5GNR_FEC_NUM_VFS];
@@ -213,15 +196,15 @@ parameters defined in ``fpga_5gnr_fec_conf`` structure:
   the FLR time out then set this setting to 0x262=610.
 
 
-An example configuration code calling the function ``fpga_5gnr_fec_configure()`` is shown
+An example configuration code calling the function ``rte_fpga_5gnr_fec_configure()`` is shown
 below:
 
 .. code-block:: c
 
-  struct fpga_5gnr_fec_conf conf;
+  struct rte_fpga_5gnr_fec_conf conf;
   unsigned int i;
 
-  memset(&conf, 0, sizeof(struct fpga_5gnr_fec_conf));
+  memset(&conf, 0, sizeof(struct rte_fpga_5gnr_fec_conf));
   conf.pf_mode_en = 1;
 
   for (i = 0; i < FPGA_5GNR_FEC_NUM_VFS; ++i) {
@@ -234,7 +217,7 @@ below:
   conf.ul_load_balance = 64;
 
   /* setup FPGA PF */
-  ret = fpga_5gnr_fec_configure(info->dev_name, &conf);
+  ret = rte_fpga_5gnr_fec_configure(info->dev_name, &conf);
   TEST_ASSERT_SUCCESS(ret,
       "Failed to configure 4G FPGA PF for bbdev %s",
       info->dev_name);
@@ -289,3 +272,22 @@ Test Vectors
 In addition to the simple LDPC decoder and LDPC encoder tests, bbdev also provides
 a range of additional tests under the test_vectors folder, which may be useful. The results
 of these tests will depend on the FPGA 5GNR FEC capabilities.
+
+
+Alternate Baseband Device configuration tool
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+On top of the embedded configuration feature supported in test-bbdev using "- -init-device"
+option, there is also a tool available to perform that device configuration using a companion
+application.
+The ``pf_bb_config`` application notably enables then to run bbdev-test from the VF
+and not only limited to the PF as captured above.
+
+See for more details: https://github.com/intel/pf-bb-config
+
+Specifically for the BBDEV FPGA 5GNR FEC PMD, the command below can be used:
+
+.. code-block:: console
+
+  ./pf_bb_config FPGA_5GNR -c fpga_5gnr/fpga_5gnr_config_vf.cfg
+  ./test-bbdev.py -e="-c 0xff0 -a${VF_PCI_ADDR}" -c validation -n 64 -b 32 -l 1 -v ./ldpc_dec_default.data