crypto/ipsec_mb: add chacha_poly PMD

[dpdk.git] / doc / guides / cryptodevs / cnxk.rst

diff --git a/doc/guides/cryptodevs/cnxk.rst b/doc/guides/cryptodevs/cnxk.rst
index 66b0b63..85171a5 100644 (file)
--- a/doc/guides/cryptodevs/cnxk.rst
+++ b/doc/guides/cryptodevs/cnxk.rst
@@ -67,6 +67,12 @@ AEAD algorithms:
 * ``RTE_CRYPTO_AEAD_AES_GCM``
 * ``RTE_CRYPTO_AEAD_CHACHA20_POLY1305``
 
+Asymmetric Crypto Algorithms
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+* ``RTE_CRYPTO_ASYM_XFORM_RSA``
+* ``RTE_CRYPTO_ASYM_XFORM_MODEX``
+
 Installation
 ------------
 
@@ -152,6 +158,21 @@ Bind the CPT VF device to the vfio_pci driver:
     ./usertools/dpdk-devbind.py -u 0002:20:00.1
     ./usertools/dpdk-devbind.py -b vfio-pci 0002:20:00.1
 
+Runtime Config Options
+----------------------
+
+- ``Maximum queue pairs limit`` (default ``63``)
+
+   The number of maximum queue pairs supported by the device, can be limited
+   during runtime by using ``max_qps_limit`` ``devargs`` parameter.
+
+   For example::
+
+      -a 0002:20:00.1,max_qps_limit=4
+
+   With the above configuration, the number of maximum queue pairs supported
+   by the device is limited to 4.
+
 Debugging Options
 -----------------
 
@@ -185,6 +206,60 @@ running the test application:
     ./dpdk-test
     RTE>>cryptodev_cn10k_autotest
 
+The asymmetric crypto operations on OCTEON cnxk crypto PMD may be verified by
+running the test application:
+
+``CN9K``
+
+.. code-block:: console
+
+    ./dpdk-test
+    RTE>>cryptodev_cn9k_asym_autotest
+
+``CN10K``
+
+.. code-block:: console
+
+    ./dpdk-test
+    RTE>>cryptodev_cn10k_asym_autotest
+
+Lookaside IPsec Support
+-----------------------
+
+The OCTEON cnxk SoCs can accelerate IPsec traffic in lookaside protocol mode,
+with its **cryptographic accelerator (CPT)**. ``OCTEON cnxk crypto PMD`` implements
+this as an ``RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL`` offload.
+
+Refer to :doc:`../prog_guide/rte_security` for more details on protocol offloads.
+
+This feature can be tested with ipsec-secgw sample application.
+
+Supported OCTEON cnxk SoCs
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+- CN9XX
+- CN10XX
+
+CN9XX Features supported
+~~~~~~~~~~~~~~~~~~~~~~~~
+
+* IPv4
+* ESP
+* Tunnel mode
+* UDP Encapsulation
+* AES-128/192/256-GCM
+
+CN10XX Features supported
+~~~~~~~~~~~~~~~~~~~~~~~~~
+
+* IPv4
+* ESP
+* Tunnel mode
+* Transport mode
+* UDP Encapsulation
+* AES-128/192/256-GCM
+* AES-128/192/256-CBC-SHA1-HMAC
+
 Limitations
 -----------