- Open system with configurable amount of outstanding events limited only by
DRAM
- HW accelerated dequeue timeout support to enable power management
+- HW managed event timers support through TIM, with high precision and
+ time granularity of 2.5us on CN9K and 1us on CN10K.
+- Up to 256 TIM rings a.k.a event timer adapters.
+- Up to 8 rings traversed in parallel.
Prerequisites and Compilation procedure
---------------------------------------
-a 0002:0e:00.0,xae_cnt=16384
+- ``CN9K Getwork mode``
+
+ CN9K ``single_ws`` devargs parameter is introduced to select single workslot
+ mode in SSO and disable the default dual workslot mode.
+
+ For example::
+
+ -a 0002:0e:00.0,single_ws=1
+
+- ``CN10K Getwork mode``
+
+ CN10K supports multiple getwork prefetch modes, by default the prefetch
+ mode is set to none.
+
+ For example::
+
+ -a 0002:0e:00.0,gw_mode=1
+
- ``Event Group QoS support``
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
-a 0002:0e:00.0,qos=[1-50-50-50]
+- ``TIM disable NPA``
+
+ By default chunks are allocated from NPA then TIM can automatically free
+ them when traversing the list of chunks. The ``tim_disable_npa`` devargs
+ parameter disables NPA and uses software mempool to manage chunks
+
+ For example::
+
+ -a 0002:0e:00.0,tim_disable_npa=1
+
Debugging Options
-----------------
+===+============+=======================================================+
| 1 | SSO | --log-level='pmd\.event\.cnxk,8' |
+---+------------+-------------------------------------------------------+
+ | 2 | TIM | --log-level='pmd\.event\.cnxk\.timer,8' |
+ +---+------------+-------------------------------------------------------+