Supported OCTEON TX2 SoCs
-------------------------
+- CN98xx
- CN96xx
- CN93xx
+---+-----+--------------------------------------------------------------+
| 6 | TIM | rte_event_timer_adapter |
+---+-----+--------------------------------------------------------------+
+ | 7 | LBK | rte_ethdev |
+ +---+-----+--------------------------------------------------------------+
+ | 8 | DPI | rte_rawdev |
+ +---+-----+--------------------------------------------------------------+
+ | 9 | SDP | rte_ethdev |
+ +---+-----+--------------------------------------------------------------+
+ | 10| REE | rte_regexdev |
+ +---+-----+--------------------------------------------------------------+
PF0 is called the administrative / admin function (AF) and has exclusive
privileges to provision RVU functional block's LFs to each of the PF/VF.
2. PFx-VF1 ethdev driver bound to the first DPDK application.
3. PFy ethdev driver, PFy-VF0 ethdev driver, PFz eventdev driver, PFm-VF0 cryptodev driver bound to the second DPDK application.
+LBK HW Access
+-------------
+
+Loopback HW Unit (LBK) receives packets from NIX-RX and sends packets back to NIX-TX.
+The loopback block has N channels and contains data buffering that is shared across
+all channels. The LBK HW Unit is abstracted using ethdev subsystem, Where PF0's
+VFs are exposed as ethdev device and odd-even pairs of VFs are tied together,
+that is, packets sent on odd VF end up received on even VF and vice versa.
+This would enable HW accelerated means of communication between two domains
+where even VF bound to the first domain and odd VF bound to the second domain.
+
+Typical application usage models are,
+
+#. Communication between the Linux kernel and DPDK application.
+#. Exception path to Linux kernel from DPDK application as SW ``KNI`` replacement.
+#. Communication between two different DPDK applications.
+
+SDP interface
+-------------
+
+System DPI Packet Interface unit(SDP) provides PCIe endpoint support for remote host
+to DMA packets into and out of OCTEON TX2 SoC. SDP interface comes in to live only when
+OCTEON TX2 SoC is connected in PCIe endpoint mode. It can be used to send/receive
+packets to/from remote host machine using input/output queue pairs exposed to it.
+SDP interface receives input packets from remote host from NIX-RX and sends packets
+to remote host using NIX-TX. Remote host machine need to use corresponding driver
+(kernel/user mode) to communicate with SDP interface on OCTEON TX2 SoC. SDP supports
+single PCIe SRIOV physical function(PF) and multiple virtual functions(VF's). Users
+can bind PF or VF to use SDP interface and it will be enumerated as ethdev ports.
+
+The primary use case for SDP is to enable the smart NIC use case. Typical usage models are,
+
+#. Communication channel between remote host and OCTEON TX2 SoC over PCIe.
+#. Transfer packets received from network interface to remote host over PCIe and
+ vice-versa.
+
OCTEON TX2 packet flow
----------------------
#. **DMA Rawdev Driver**
See :doc:`../rawdevs/octeontx2_dma` for DMA driver information.
+#. **Crypto Device Driver**
+ See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information.
+
+#. **Regex Device Driver**
+ See :doc:`../regexdevs/octeontx2` for REE regex device driver information.
+
Procedure to Setup Platform
---------------------------
.. code-block:: console
octeontx2/
- ├── cgx
- │ ├── cgx0
- │ │ └── lmac0
- │ │ └── stats
- │ ├── cgx1
- │ │ ├── lmac0
- │ │ │ └── stats
- │ │ └── lmac1
- │ │ └── stats
- │ └── cgx2
- │ └── lmac0
- │ └── stats
- ├── cpt
- │ ├── cpt_engines_info
- │ ├── cpt_engines_sts
- │ ├── cpt_err_info
- │ ├── cpt_lfs_info
- │ └── cpt_pc
- ├──── nix
- │ ├── cq_ctx
- │ ├── ndc_rx_cache
- │ ├── ndc_rx_hits_miss
- │ ├── ndc_tx_cache
- │ ├── ndc_tx_hits_miss
- │ ├── qsize
- │ ├── rq_ctx
- │ ├── sq_ctx
- │ └── tx_stall_hwissue
- ├── npa
- │ ├── aura_ctx
- │ ├── ndc_cache
- │ ├── ndc_hits_miss
- │ ├── pool_ctx
- │ └── qsize
- ├── npc
- │ ├── mcam_info
- │ └── rx_miss_act_stats
- ├── rsrc_alloc
- └── sso
- ├── hws
- │ └── sso_hws_info
- └── hwgrp
- ├── sso_hwgrp_aq_thresh
- ├── sso_hwgrp_iaq_walk
- ├── sso_hwgrp_pc
- ├── sso_hwgrp_free_list_walk
- ├── sso_hwgrp_ient_walk
- └── sso_hwgrp_taq_walk
+ |-- cgx
+ | |-- cgx0
+ | | '-- lmac0
+ | | '-- stats
+ | |-- cgx1
+ | | |-- lmac0
+ | | | '-- stats
+ | | '-- lmac1
+ | | '-- stats
+ | '-- cgx2
+ | '-- lmac0
+ | '-- stats
+ |-- cpt
+ | |-- cpt_engines_info
+ | |-- cpt_engines_sts
+ | |-- cpt_err_info
+ | |-- cpt_lfs_info
+ | '-- cpt_pc
+ |---- nix
+ | |-- cq_ctx
+ | |-- ndc_rx_cache
+ | |-- ndc_rx_hits_miss
+ | |-- ndc_tx_cache
+ | |-- ndc_tx_hits_miss
+ | |-- qsize
+ | |-- rq_ctx
+ | |-- sq_ctx
+ | '-- tx_stall_hwissue
+ |-- npa
+ | |-- aura_ctx
+ | |-- ndc_cache
+ | |-- ndc_hits_miss
+ | |-- pool_ctx
+ | '-- qsize
+ |-- npc
+ | |-- mcam_info
+ | '-- rx_miss_act_stats
+ |-- rsrc_alloc
+ '-- sso
+ |-- hws
+ | '-- sso_hws_info
+ '-- hwgrp
+ |-- sso_hwgrp_aq_thresh
+ |-- sso_hwgrp_iaq_walk
+ |-- sso_hwgrp_pc
+ |-- sso_hwgrp_free_list_walk
+ |-- sso_hwgrp_ient_walk
+ '-- sso_hwgrp_taq_walk
RVU block LF allocation:
Native Compilation
~~~~~~~~~~~~~~~~~~
-make build
-^^^^^^^^^^
-
-.. code-block:: console
-
- make config T=arm64-octeontx2-linux-gcc
- make -j
-
-The example applications can be compiled using the following:
-
-.. code-block:: console
-
- cd <dpdk directory>
- export RTE_SDK=$PWD
- export RTE_TARGET=build
- cd examples/<application>
- make -j
-
-meson build
-^^^^^^^^^^^
-
.. code-block:: console
meson build
Refer to :doc:`../linux_gsg/cross_build_dpdk_for_arm64` for generic arm64 details.
-make build
-^^^^^^^^^^
-
-.. code-block:: console
-
- make config T=arm64-octeontx2-linux-gcc
- make -j CROSS=aarch64-marvell-linux-gnu- CONFIG_RTE_KNI_KMOD=n
-
-meson build
-^^^^^^^^^^^
-
.. code-block:: console
meson build --cross-file config/arm/arm64_octeontx2_linux_gcc