.. note::
Initialization of objects, such as memory zones, rings, memory pools, lpm tables and hash tables,
- should be done as part of the overall application initialization on the master lcore.
+ should be done as part of the overall application initialization on the main lcore.
The creation and initialization functions for these objects are not multi-thread safe.
However, once initialized, the objects themselves can safely be used in multiple threads simultaneously.
Additional restrictions are present when running in 32-bit mode. In dynamic
memory mode, by default maximum of 2 gigabytes of VA space will be preallocated,
-and all of it will be on master lcore NUMA node unless ``--socket-mem`` flag is
+and all of it will be on main lcore NUMA node unless ``--socket-mem`` flag is
used.
In legacy mode, VA space will only be preallocated for segments that were
callback. Care must be taken not to close the device from the interrupt handler
context. It is necessary to reschedule such closing operation.
-Blacklisting
-~~~~~~~~~~~~
+Block list
+~~~~~~~~~~
-The EAL PCI device blacklist functionality can be used to mark certain NIC ports as blacklisted,
+The EAL PCI device block list functionality can be used to mark certain NIC ports as unavailable,
so they are ignored by the DPDK.
-The ports to be blacklisted are identified using the PCIe* description (Domain:Bus:Device.Function).
+The ports to be blocked are identified using the PCIe* description (Domain:Bus:Device.Function).
Misc Functions
~~~~~~~~~~~~~~
- By default, the mempool, first asks for IOVA-contiguous memory using
``RTE_MEMZONE_IOVA_CONTIG``. This is slow in RTE_IOVA_PA mode and it may
affect the application boot time.
- - It is easy to enable large amount of IOVA-contiguous memory use-cases
+ - It is easy to enable large amount of IOVA-contiguous memory use cases
with IOVA in VA mode.
It is expected that all PCI drivers work in both RTE_IOVA_PA and
- with affinity restricted to 2-4, the Control Threads will end up on
CPU 4.
- with affinity restricted to 2-3, the Control Threads will end up on
- CPU 2 (master lcore, which is the default when no CPU is available).
+ CPU 2 (main lcore, which is the default when no CPU is available).
.. _known_issue_label: