mem: instrument allocator for ASan

[dpdk.git] / doc / guides / prog_guide / writing_efficient_code.rst

diff --git a/doc/guides/prog_guide/writing_efficient_code.rst b/doc/guides/prog_guide/writing_efficient_code.rst
index 2639ef7..a61e832 100644 (file)
--- a/doc/guides/prog_guide/writing_efficient_code.rst
+++ b/doc/guides/prog_guide/writing_efficient_code.rst
@@ -143,20 +143,21 @@ In order to achieve higher throughput,
 the DPDK attempts to aggregate the cost of processing each packet individually by processing packets in bursts.
 
 Using the testpmd application as an example,
-the burst size can be set on the command line to a value of 16 (also the default value).
-This allows the application to request 16 packets at a time from the PMD.
+the burst size can be set on the command line to a value of 32 (also the default value).
+This allows the application to request 32 packets at a time from the PMD.
 The testpmd application then immediately attempts to transmit all the packets that were received,
-in this case, all 16 packets.
+in this case, all 32 packets.
 
 The packets are not transmitted until the tail pointer is updated on the corresponding TX queue of the network port.
 This behavior is desirable when tuning for high throughput because
-the cost of tail pointer updates to both the RX and TX queues can be spread across 16 packets,
+the cost of tail pointer updates to both the RX and TX queues can be spread
+across 32 packets,
 effectively hiding the relatively slow MMIO cost of writing to the PCIe* device.
 However, this is not very desirable when tuning for low latency because
-the first packet that was received must also wait for another 15 packets to be received.
-It cannot be transmitted until the other 15 packets have also been processed because
+the first packet that was received must also wait for another 31 packets to be received.
+It cannot be transmitted until the other 31 packets have also been processed because
 the NIC will not know to transmit the packets until the TX tail pointer has been updated,
-which is not done until all 16 packets have been processed for transmission.
+which is not done until all 32 packets have been processed for transmission.
 
 To consistently achieve low latency, even under heavy system load,
 the application developer should avoid processing packets in bunches.
@@ -258,8 +259,7 @@ For instance:
 Setting the Target CPU Type
 ---------------------------
 
-The DPDK supports CPU microarchitecture-specific optimizations by means of CONFIG_RTE_MACHINE option
-in the DPDK configuration file.
+The DPDK supports CPU microarchitecture-specific optimizations by means of RTE_MACHINE option.
 The degree of optimization depends on the compiler's ability to optimize for a specific microarchitecture,
 therefore it is preferable to use the latest compiler versions whenever possible.
 
@@ -273,5 +273,3 @@ main() function and checks if the current machine is suitable for running the bi
 Along with compiler optimizations,
 a set of preprocessor defines are automatically added to the build process (regardless of the compiler version).
 These defines correspond to the instruction sets that the target CPU should be able to support.
-For example, a binary compiled for any SSE4.2-capable processor will have RTE_MACHINE_CPUFLAG_SSE4_2 defined,
-thus enabling compile-time code path selection for different platforms.