.. note::
To get statistics on the sample app using the command line interface as described in the next section,
- DPDK must be compiled defining *CONFIG_RTE_SCHED_COLLECT_STATS*,
- which can be done by changing the configuration file for the specific target to be compiled.
+ DPDK must be compiled defining *RTE_SCHED_COLLECT_STATS*, which can be done by changing the relevant
+ entry in the ``config/rte_config.h`` file.
Running the Application
-----------------------
.. code-block:: console
- ./qos_sched [EAL options] -- <APP PARAMS>
+ ./<build_dir>/examples/dpdk-qos_sched [EAL options] -- <APP PARAMS>
Mandatory application parameters include:
In this mode, the application shows a command line that can be used for obtaining statistics while
scheduling is taking place (see interactive mode below for more information).
-* --mst n: Master core index (the default value is 1).
+* --mnc n: Main core index (the default value is 1).
* --rsz "A, B, C": Ring sizes:
[subport 0]
number of pipes per subport = 4096
queue sizes = 64 64 64 64 64 64 64 64 64 64 64 64 64
+
+ subport 0-8 = 0 ; These subports are configured with subport profile 0
+
+ [subport profile 0]
tb rate = 1250000000; Bytes per second
tb size = 1000000; Bytes
tc 0 rate = 1250000000; Bytes per second
.. code-block:: console
- ./qos_sched -l 1,5,7 -n 4 -- --pfc "3,2,5,7" --cfg ./profile.cfg
+ ./<build_dir>/examples/dpdk-qos_sched -l 1,5,7 -n 4 -- --pfc "3,2,5,7" --cfg ./profile.cfg
This example uses a single packet flow configuration which creates one RX thread on lcore 5 reading
from port 3 and a worker thread on lcore 7 writing to port 2.
.. code-block:: console
- ./qos_sched -l 1,2,6,7 -n 4 -- --pfc "3,2,2,6,7" --pfc "1,0,2,6,7" --cfg ./profile.cfg
+ ./<build_dir>/examples/dpdk-qos_sched -l 1,2,6,7 -n 4 -- --pfc "3,2,2,6,7" --pfc "1,0,2,6,7" --cfg ./profile.cfg
Note that independent cores for the packet flow configurations for each of the RX, WT and TX thread are also supported,
providing flexibility to balance the work.
-The EAL coremask/corelist is constrained to contain the default mastercore 1 and the RX, WT and TX cores only.
+The EAL coremask/corelist is constrained to contain the default main core 1 and the RX, WT and TX cores only.
Explanation
-----------