net/txgbe: add build and doc infrastructure
[dpdk.git] / drivers / baseband / fpga_5gnr_fec / rte_fpga_5gnr_fec.c
index e152b20..bd99fb4 100644 (file)
 #include "fpga_5gnr_fec.h"
 #include "rte_pmd_fpga_5gnr_fec.h"
 
-/* 5GNR SW PMD logging ID */
-static int fpga_5gnr_fec_logtype;
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
+RTE_LOG_REGISTER(fpga_5gnr_fec_logtype, pmd.bb.fpga_5gnr_fec, DEBUG);
+#else
+RTE_LOG_REGISTER(fpga_5gnr_fec_logtype, pmd.bb.fpga_5gnr_fec, NOTICE);
+#endif
 
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
 
@@ -947,14 +950,14 @@ fpga_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
        desc->num_null = op->ldpc_enc.n_filler;
        /* Set inbound data buffer address */
        desc->in_addr_hi = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(input, in_offset) >> 32);
+                       rte_pktmbuf_iova_offset(input, in_offset) >> 32);
        desc->in_addr_lw = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(input, in_offset));
+                       rte_pktmbuf_iova_offset(input, in_offset));
 
        desc->out_addr_hi = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(output, out_offset) >> 32);
+                       rte_pktmbuf_iova_offset(output, out_offset) >> 32);
        desc->out_addr_lw = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(output, out_offset));
+                       rte_pktmbuf_iova_offset(output, out_offset));
        /* Save software context needed for dequeue */
        desc->op_addr = op;
        /* Set total number of CBs in an op */
@@ -995,9 +998,9 @@ fpga_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
        desc->error = 0;
        /* Set inbound data buffer address */
        desc->in_addr_hi = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(input, in_offset) >> 32);
+                       rte_pktmbuf_iova_offset(input, in_offset) >> 32);
        desc->in_addr_lw = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(input, in_offset));
+                       rte_pktmbuf_iova_offset(input, in_offset));
        desc->rm_e = op->ldpc_dec.cb_params.e;
        desc->harq_input_length = harq_in_length;
        desc->et_dis = !check_bit(op->ldpc_dec.op_flags,
@@ -1018,9 +1021,9 @@ fpga_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
        desc->max_iter = op->ldpc_dec.iter_max;
        desc->qm_idx = op->ldpc_dec.q_m / 2;
        desc->out_addr_hi = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(output, out_offset) >> 32);
+                       rte_pktmbuf_iova_offset(output, out_offset) >> 32);
        desc->out_addr_lw = (uint32_t)(
-                       rte_pktmbuf_mtophys_offset(output, out_offset));
+                       rte_pktmbuf_iova_offset(output, out_offset));
        /* Save software context needed for dequeue */
        desc->op_addr = op;
        /* Set total number of CBs in an op */
@@ -1836,7 +1839,7 @@ fpga_5gnr_fec_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
 
        rte_bbdev_log_debug(
                        "Init device %s [%s] @ virtaddr %p phyaddr %#"PRIx64,
-                       dev->device->driver->name, dev->data->name,
+                       drv->driver.name, dev->data->name,
                        (void *)pci_dev->mem_resource[0].addr,
                        pci_dev->mem_resource[0].phys_addr);
 }
@@ -1892,7 +1895,7 @@ fpga_5gnr_fec_probe(struct rte_pci_driver *pci_drv,
                ((uint16_t)(version_id >> 16)), ((uint16_t)version_id));
 
 #ifdef RTE_LIBRTE_BBDEV_DEBUG
-       if (!strcmp(bbdev->device->driver->name,
+       if (!strcmp(pci_drv->driver.name,
                        RTE_STR(FPGA_5GNR_FEC_PF_DRIVER_NAME)))
                print_static_reg_debug_info(d->mmio_base);
 #endif
@@ -1941,10 +1944,10 @@ fpga_5gnr_fec_remove(struct rte_pci_device *pci_dev)
 }
 
 static inline void
-set_default_fpga_conf(struct fpga_5gnr_fec_conf *def_conf)
+set_default_fpga_conf(struct rte_fpga_5gnr_fec_conf *def_conf)
 {
        /* clear default configuration before initialization */
-       memset(def_conf, 0, sizeof(struct fpga_5gnr_fec_conf));
+       memset(def_conf, 0, sizeof(struct rte_fpga_5gnr_fec_conf));
        /* Set pf mode to true */
        def_conf->pf_mode_en = true;
 
@@ -1959,15 +1962,15 @@ set_default_fpga_conf(struct fpga_5gnr_fec_conf *def_conf)
 
 /* Initial configuration of FPGA 5GNR FEC device */
 int
-fpga_5gnr_fec_configure(const char *dev_name,
-               const struct fpga_5gnr_fec_conf *conf)
+rte_fpga_5gnr_fec_configure(const char *dev_name,
+               const struct rte_fpga_5gnr_fec_conf *conf)
 {
        uint32_t payload_32, address;
        uint16_t payload_16;
        uint8_t payload_8;
        uint16_t q_id, vf_id, total_q_id, total_ul_q_id, total_dl_q_id;
        struct rte_bbdev *bbdev = rte_bbdev_get_named_dev(dev_name);
-       struct fpga_5gnr_fec_conf def_conf;
+       struct rte_fpga_5gnr_fec_conf def_conf;
 
        if (bbdev == NULL) {
                rte_bbdev_log(ERR,
@@ -2174,14 +2177,3 @@ RTE_PMD_REGISTER_PCI_TABLE(FPGA_5GNR_FEC_PF_DRIVER_NAME,
 RTE_PMD_REGISTER_PCI(FPGA_5GNR_FEC_VF_DRIVER_NAME, fpga_5gnr_fec_pci_vf_driver);
 RTE_PMD_REGISTER_PCI_TABLE(FPGA_5GNR_FEC_VF_DRIVER_NAME,
                pci_id_fpga_5gnr_fec_vf_map);
-
-RTE_INIT(fpga_5gnr_fec_init_log)
-{
-       fpga_5gnr_fec_logtype = rte_log_register("pmd.bb.fpga_5gnr_fec");
-       if (fpga_5gnr_fec_logtype >= 0)
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
-               rte_log_set_level(fpga_5gnr_fec_logtype, RTE_LOG_DEBUG);
-#else
-               rte_log_set_level(fpga_5gnr_fec_logtype, RTE_LOG_NOTICE);
-#endif
-}