#include "fpga_lte_fec.h"
-/* Turbo SW PMD logging ID */
-static int fpga_lte_fec_logtype;
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
+RTE_LOG_REGISTER(fpga_lte_fec_logtype, pmd.bb.fpga_lte_fec, DEBUG);
+#else
+RTE_LOG_REGISTER(fpga_lte_fec_logtype, pmd.bb.fpga_lte_fec, NOTICE);
+#endif
/* Helper macro for logging */
#define rte_bbdev_log(level, fmt, ...) \
};
/* FPGA LTE FEC DMA Encoding Request Descriptor */
-struct __attribute__((__packed__)) fpga_dma_enc_desc {
+struct __rte_packed fpga_dma_enc_desc {
uint32_t done:1,
rsrvd0:11,
error:4,
};
/* FPGA LTE FEC DMA Decoding Request Descriptor */
-struct __attribute__((__packed__)) fpga_dma_dec_desc {
+struct __rte_packed fpga_dma_dec_desc {
uint32_t done:1,
iter:5,
rsrvd0:2,
};
/* FPGA LTE FEC Ring Control Register */
-struct __attribute__((__packed__)) fpga_ring_ctrl_reg {
+struct __rte_packed fpga_ring_ctrl_reg {
uint64_t ring_base_addr;
uint64_t ring_head_addr;
uint16_t ring_size:11;
* completed. If completion flag is not updated within 1ms it is
* considered as a failure.
*/
- while (!(*((uint8_t *)d->flush_queue_status + q->q_idx) & payload)) {
+ while (!(*((volatile uint8_t *)d->flush_queue_status + q->q_idx) & payload)) {
if (counter > timeout) {
rte_bbdev_log(ERR, "FPGA Queue Flush failed for queue %d",
queue_id);
desc->offset = desc_offset;
/* Set inbound data buffer address */
desc->in_addr_hi = (uint32_t)(
- rte_pktmbuf_mtophys_offset(input, in_offset) >> 32);
+ rte_pktmbuf_iova_offset(input, in_offset) >> 32);
desc->in_addr_lw = (uint32_t)(
- rte_pktmbuf_mtophys_offset(input, in_offset));
+ rte_pktmbuf_iova_offset(input, in_offset));
desc->out_addr_hi = (uint32_t)(
- rte_pktmbuf_mtophys_offset(output, out_offset) >> 32);
+ rte_pktmbuf_iova_offset(output, out_offset) >> 32);
desc->out_addr_lw = (uint32_t)(
- rte_pktmbuf_mtophys_offset(output, out_offset));
+ rte_pktmbuf_iova_offset(output, out_offset));
/* Save software context needed for dequeue */
desc->op_addr = op;
desc->done = 0;
/* Set inbound data buffer address */
desc->in_addr_hi = (uint32_t)(
- rte_pktmbuf_mtophys_offset(input, in_offset) >> 32);
+ rte_pktmbuf_iova_offset(input, in_offset) >> 32);
desc->in_addr_lw = (uint32_t)(
- rte_pktmbuf_mtophys_offset(input, in_offset));
+ rte_pktmbuf_iova_offset(input, in_offset));
desc->in_len = in_length;
desc->k = k;
desc->crc_type = !check_bit(op->turbo_dec.op_flags,
desc->max_iter = op->turbo_dec.iter_max * 2;
desc->offset = desc_offset;
desc->out_addr_hi = (uint32_t)(
- rte_pktmbuf_mtophys_offset(output, out_offset) >> 32);
+ rte_pktmbuf_iova_offset(output, out_offset) >> 32);
desc->out_addr_lw = (uint32_t)(
- rte_pktmbuf_mtophys_offset(output, out_offset));
+ rte_pktmbuf_iova_offset(output, out_offset));
/* Save software context needed for dequeue */
desc->op_addr = op;
validate_dec_op(struct rte_bbdev_dec_op *op)
{
struct rte_bbdev_op_turbo_dec *turbo_dec = &op->turbo_dec;
- struct rte_bbdev_op_dec_cb_params *cb = NULL;
- struct rte_bbdev_op_dec_tb_params *tb = NULL;
+ struct rte_bbdev_op_dec_turbo_cb_params *cb = NULL;
+ struct rte_bbdev_op_dec_turbo_tb_params *tb = NULL;
if (op->mempool == NULL) {
rte_bbdev_log(ERR, "Invalid mempool pointer");
/* Initialization Function */
static void
-fpga_lte_fec_init(struct rte_bbdev *dev)
+fpga_lte_fec_init(struct rte_bbdev *dev, struct rte_pci_driver *drv)
{
struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
dev->dequeue_dec_ops = fpga_dequeue_dec;
((struct fpga_lte_fec_device *) dev->data->dev_private)->pf_device =
- !strcmp(dev->device->driver->name,
+ !strcmp(drv->driver.name,
RTE_STR(FPGA_LTE_FEC_PF_DRIVER_NAME));
((struct fpga_lte_fec_device *) dev->data->dev_private)->mmio_base =
pci_dev->mem_resource[0].addr;
rte_bbdev_log_debug(
"Init device %s [%s] @ virtaddr %p phyaddr %#"PRIx64,
- dev->device->driver->name, dev->data->name,
+ drv->driver.name, dev->data->name,
(void *)pci_dev->mem_resource[0].addr,
pci_dev->mem_resource[0].phys_addr);
}
static int
-fpga_lte_fec_probe(struct rte_pci_driver *pci_drv __rte_unused,
+fpga_lte_fec_probe(struct rte_pci_driver *pci_drv,
struct rte_pci_device *pci_dev)
{
struct rte_bbdev *bbdev = NULL;
bbdev->data->socket_id = pci_dev->device.numa_node;
/* Invoke FEC FPGA device initialization function */
- fpga_lte_fec_init(bbdev);
+ fpga_lte_fec_init(bbdev, pci_drv);
rte_bbdev_log_debug("bbdev id = %u [%s]",
bbdev->data->dev_id, dev_name);
((uint16_t)(version_id >> 16)), ((uint16_t)version_id));
#ifdef RTE_LIBRTE_BBDEV_DEBUG
- if (!strcmp(bbdev->device->driver->name,
+ if (!strcmp(pci_drv->driver.name,
RTE_STR(FPGA_LTE_FEC_PF_DRIVER_NAME)))
print_static_reg_debug_info(d->mmio_base);
#endif
}
static inline void
-set_default_fpga_conf(struct fpga_lte_fec_conf *def_conf)
+set_default_fpga_conf(struct rte_fpga_lte_fec_conf *def_conf)
{
/* clear default configuration before initialization */
- memset(def_conf, 0, sizeof(struct fpga_lte_fec_conf));
+ memset(def_conf, 0, sizeof(struct rte_fpga_lte_fec_conf));
/* Set pf mode to true */
def_conf->pf_mode_en = true;
/* Initial configuration of FPGA LTE FEC device */
int
-fpga_lte_fec_configure(const char *dev_name,
- const struct fpga_lte_fec_conf *conf)
+rte_fpga_lte_fec_configure(const char *dev_name,
+ const struct rte_fpga_lte_fec_conf *conf)
{
uint32_t payload_32, address;
uint16_t payload_16;
uint8_t payload_8;
uint16_t q_id, vf_id, total_q_id, total_ul_q_id, total_dl_q_id;
struct rte_bbdev *bbdev = rte_bbdev_get_named_dev(dev_name);
- struct fpga_lte_fec_conf def_conf;
+ struct rte_fpga_lte_fec_conf def_conf;
if (bbdev == NULL) {
rte_bbdev_log(ERR,
RTE_PMD_REGISTER_PCI(FPGA_LTE_FEC_VF_DRIVER_NAME, fpga_lte_fec_pci_vf_driver);
RTE_PMD_REGISTER_PCI_TABLE(FPGA_LTE_FEC_VF_DRIVER_NAME,
pci_id_fpga_lte_fec_vf_map);
-
-RTE_INIT(fpga_lte_fec_init_log)
-{
- fpga_lte_fec_logtype = rte_log_register("pmd.bb.fpga_lte_fec");
- if (fpga_lte_fec_logtype >= 0)
-#ifdef RTE_LIBRTE_BBDEV_DEBUG
- rte_log_set_level(fpga_lte_fec_logtype, RTE_LOG_DEBUG);
-#else
- rte_log_set_level(fpga_lte_fec_logtype, RTE_LOG_NOTICE);
-#endif
-}