common/cnxk: allow reuse of SSO API for inline dev

[dpdk.git] / drivers / common / cnxk / roc_bphy_cgx.c

diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c
index a2da802..7449cbe 100644 (file)
--- a/drivers/common/cnxk/roc_bphy_cgx.c
+++ b/drivers/common/cnxk/roc_bphy_cgx.c
@@ -7,6 +7,9 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+#define CGX_CMRX_CONFIG                       0x00
+#define CGX_CMRX_CONFIG_DATA_PKT_RX_EN BIT_ULL(54)
+#define CGX_CMRX_CONFIG_DATA_PKT_TX_EN BIT_ULL(53)
 #define CGX_CMRX_INT                  0x40
 #define CGX_CMRX_INT_OVERFLW          BIT_ULL(1)
 /*
@@ -214,6 +217,33 @@ roc_bphy_cgx_lmac_exists(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
               (roc_cgx->lmac_bmap & BIT_ULL(lmac));
 }
 
+static int
+roc_bphy_cgx_start_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+                            bool start)
+{
+       uint64_t val;
+
+       if (!roc_cgx)
+               return -EINVAL;
+
+       if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+               return -ENODEV;
+
+       pthread_mutex_lock(&roc_cgx->lock);
+       val = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_CONFIG);
+       val &= ~(CGX_CMRX_CONFIG_DATA_PKT_RX_EN |
+                CGX_CMRX_CONFIG_DATA_PKT_TX_EN);
+
+       if (start)
+               val |= FIELD_PREP(CGX_CMRX_CONFIG_DATA_PKT_RX_EN, 1) |
+                      FIELD_PREP(CGX_CMRX_CONFIG_DATA_PKT_TX_EN, 1);
+
+       roc_bphy_cgx_write(roc_cgx, lmac, CGX_CMRX_CONFIG, val);
+       pthread_mutex_unlock(&roc_cgx->lock);
+
+       return 0;
+}
+
 static int
 roc_bphy_cgx_intlbk_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
                            bool enable)
@@ -253,6 +283,36 @@ roc_bphy_cgx_ptp_rx_ena_dis(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
        return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
 }
 
+int
+roc_bphy_cgx_start_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+       return roc_bphy_cgx_start_stop_rxtx(roc_cgx, lmac, true);
+}
+
+int
+roc_bphy_cgx_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
+{
+       return roc_bphy_cgx_start_stop_rxtx(roc_cgx, lmac, false);
+}
+
+int
+roc_bphy_cgx_set_link_state(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+                           bool state)
+{
+       uint64_t scr1, scr0;
+
+       if (!roc_cgx)
+               return -EINVAL;
+
+       if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+               return -ENODEV;
+
+       scr1 = state ? FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_LINK_BRING_UP) :
+                      FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_LINK_BRING_DOWN);
+
+       return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
+
 int
 roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
                          struct roc_bphy_cgx_link_info *info)
@@ -284,6 +344,34 @@ roc_bphy_cgx_get_linkinfo(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
        return 0;
 }
 
+int
+roc_bphy_cgx_set_link_mode(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+                          struct roc_bphy_cgx_link_mode *mode)
+{
+       uint64_t scr1, scr0;
+
+       if (roc_model_is_cn10k())
+               return -ENOTSUP;
+
+       if (!roc_cgx)
+               return -EINVAL;
+
+       if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+               return -ENODEV;
+
+       if (!mode)
+               return -EINVAL;
+
+       scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_MODE_CHANGE) |
+              FIELD_PREP(SCR1_ETH_MODE_CHANGE_ARGS_SPEED, mode->speed) |
+              FIELD_PREP(SCR1_ETH_MODE_CHANGE_ARGS_DUPLEX, mode->full_duplex) |
+              FIELD_PREP(SCR1_ETH_MODE_CHANGE_ARGS_AN, mode->an) |
+              FIELD_PREP(SCR1_ETH_MODE_CHANGE_ARGS_PORT, mode->port) |
+              FIELD_PREP(SCR1_ETH_MODE_CHANGE_ARGS_MODE, BIT_ULL(mode->mode));
+
+       return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
+
 int
 roc_bphy_cgx_intlbk_enable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 {
@@ -307,3 +395,46 @@ roc_bphy_cgx_ptp_rx_disable(struct roc_bphy_cgx *roc_cgx, unsigned int lmac)
 {
        return roc_bphy_cgx_ptp_rx_ena_dis(roc_cgx, lmac, false);
 }
+
+int
+roc_bphy_cgx_fec_set(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+                    enum roc_bphy_cgx_eth_link_fec fec)
+{
+       uint64_t scr1, scr0;
+
+       if (!roc_cgx)
+               return -EINVAL;
+
+       if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+               return -ENODEV;
+
+       scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_SET_FEC) |
+              FIELD_PREP(SCR1_ETH_SET_FEC_ARGS, fec);
+
+       return roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+}
+
+int
+roc_bphy_cgx_fec_supported_get(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,
+                              enum roc_bphy_cgx_eth_link_fec *fec)
+{
+       uint64_t scr1, scr0;
+       int ret;
+
+       if (!roc_cgx || !fec)
+               return -EINVAL;
+
+       if (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))
+               return -ENODEV;
+
+       scr1 = FIELD_PREP(SCR1_ETH_CMD_ID, ETH_CMD_GET_SUPPORTED_FEC);
+
+       ret = roc_bphy_cgx_intf_req(roc_cgx, lmac, scr1, &scr0);
+       if (ret)
+               return ret;
+
+       scr0 = FIELD_GET(SCR0_ETH_FEC_TYPES_S_FEC, scr0);
+       *fec = (enum roc_bphy_cgx_eth_link_fec)scr0;
+
+       return 0;
+}