plt_read64(lf->rbase + CPT_LF_Q_GRP_PTR));
}
+int
+cpt_lf_outb_cfg(struct dev *dev, uint16_t sso_pf_func, uint16_t nix_pf_func,
+ uint8_t lf_id, bool ena)
+{
+ struct cpt_inline_ipsec_cfg_msg *req;
+ struct mbox *mbox = dev->mbox;
+
+ req = mbox_alloc_msg_cpt_inline_ipsec_cfg(mbox);
+ if (req == NULL)
+ return -ENOSPC;
+
+ req->dir = CPT_INLINE_OUTBOUND;
+ req->slot = lf_id;
+ if (ena) {
+ req->enable = 1;
+ req->sso_pf_func = sso_pf_func;
+ req->nix_pf_func = nix_pf_func;
+ } else {
+ req->enable = 0;
+ }
+
+ return mbox_process(mbox);
+}
+
+int
+roc_cpt_inline_ipsec_cfg(struct dev *cpt_dev, uint8_t lf_id,
+ struct roc_nix *roc_nix)
+{
+ bool ena = roc_nix ? true : false;
+ uint16_t nix_pf_func = 0;
+ uint16_t sso_pf_func = 0;
+
+ if (ena) {
+ nix_pf_func = roc_nix_get_pf_func(roc_nix);
+ sso_pf_func = idev_sso_pffunc_get();
+ }
+
+ return cpt_lf_outb_cfg(cpt_dev, sso_pf_func, nix_pf_func, lf_id, ena);
+}
+
+int
+roc_cpt_inline_ipsec_inb_cfg(struct roc_cpt *roc_cpt, uint16_t param1,
+ uint16_t param2)
+{
+ struct cpt *cpt = roc_cpt_to_cpt_priv(roc_cpt);
+ struct cpt_rx_inline_lf_cfg_msg *req;
+ struct mbox *mbox;
+
+ mbox = cpt->dev.mbox;
+
+ req = mbox_alloc_msg_cpt_rx_inline_lf_cfg(mbox);
+ if (req == NULL)
+ return -ENOSPC;
+
+ req->sso_pf_func = idev_sso_pffunc_get();
+ req->param1 = param1;
+ req->param2 = param2;
+
+ return mbox_process(mbox);
+}
+
int
roc_cpt_rxc_time_cfg(struct roc_cpt *roc_cpt, struct roc_cpt_rxc_time_cfg *cfg)
{
{
union cpt_lf_q_size lf_q_size = {.u = 0x0};
union cpt_lf_q_base lf_q_base = {.u = 0x0};
- union cpt_lf_inprog lf_inprog;
- union cpt_lf_ctl lf_ctl;
uintptr_t addr;
lf->io_addr = lf->rbase + CPT_LF_NQX(0);
lf_q_size.s.size_div40 = CPT_IQ_NB_DESC_SIZE_DIV40(lf->nb_desc);
plt_write64(lf_q_size.u, lf->rbase + CPT_LF_Q_SIZE);
- /* Enable command queue execution */
- lf_inprog.u = plt_read64(lf->rbase + CPT_LF_INPROG);
- lf_inprog.s.eena = 1;
- plt_write64(lf_inprog.u, lf->rbase + CPT_LF_INPROG);
-
- /* Enable instruction queue enqueuing */
- lf_ctl.u = plt_read64(lf->rbase + CPT_LF_CTL);
- lf_ctl.s.ena = 1;
- lf_ctl.s.fc_ena = 1;
- lf_ctl.s.fc_up_crossing = 1;
- lf_ctl.s.fc_hyst_bits = CPT_FC_NUM_HYST_BITS;
- plt_write64(lf_ctl.u, lf->rbase + CPT_LF_CTL);
-
lf->fc_addr = (uint64_t *)addr;
+ lf->fc_hyst_bits = plt_log2_u32(lf->nb_desc) / 2;
+ lf->fc_thresh = lf->nb_desc - (lf->nb_desc % (1 << lf->fc_hyst_bits));
}
int
int rc, i;
/* Request LF resources */
- rc = cpt_lfs_attach(&cpt->dev, blkaddr, false, nb_lf);
+ rc = cpt_lfs_attach(&cpt->dev, blkaddr, true, nb_lf);
if (rc)
return rc;
if (rc)
goto disable_iq;
- cpt_lf_dump(lf);
return 0;
disable_iq:
return rc;
}
+int
+roc_cpt_lf_ctx_flush(struct roc_cpt_lf *lf, uint64_t cptr)
+{
+ union cpt_lf_ctx_flush reg;
+
+ if (lf == NULL)
+ return -ENOTSUP;
+
+ reg.u = 0;
+ reg.s.pf_func = lf->pf_func;
+ reg.s.inval = 1;
+ reg.s.cptr = cptr;
+
+ plt_write64(reg.u, lf->rbase + CPT_LF_CTX_FLUSH);
+
+ return 0;
+}
+
void
cpt_lf_fini(struct roc_cpt_lf *lf)
{
lf_inprog.s.eena = 0x0;
plt_write64(lf_inprog.u, lf->rbase + CPT_LF_INPROG);
}
+
+void
+roc_cpt_iq_enable(struct roc_cpt_lf *lf)
+{
+ union cpt_lf_inprog lf_inprog;
+ union cpt_lf_ctl lf_ctl;
+
+ /* Disable command queue */
+ roc_cpt_iq_disable(lf);
+
+ /* Enable command queue execution */
+ lf_inprog.u = plt_read64(lf->rbase + CPT_LF_INPROG);
+ lf_inprog.s.eena = 1;
+ plt_write64(lf_inprog.u, lf->rbase + CPT_LF_INPROG);
+
+ /* Enable instruction queue enqueuing */
+ lf_ctl.u = plt_read64(lf->rbase + CPT_LF_CTL);
+ lf_ctl.s.ena = 1;
+ lf_ctl.s.fc_ena = 1;
+ lf_ctl.s.fc_up_crossing = 0;
+ lf_ctl.s.fc_hyst_bits = lf->fc_hyst_bits;
+ plt_write64(lf_ctl.u, lf->rbase + CPT_LF_CTL);
+
+ cpt_lf_dump(lf);
+}
+
+int
+roc_cpt_lmtline_init(struct roc_cpt *roc_cpt, struct roc_cpt_lmtline *lmtline,
+ int lf_id)
+{
+ struct roc_cpt_lf *lf;
+
+ lf = roc_cpt->lf[lf_id];
+ if (lf == NULL)
+ return -ENOTSUP;
+
+ lmtline->io_addr = lf->io_addr;
+ if (roc_model_is_cn10k())
+ lmtline->io_addr |= ROC_CN10K_CPT_INST_DW_M1 << 4;
+
+ lmtline->fc_addr = lf->fc_addr;
+ lmtline->lmt_base = lf->lmt_base;
+
+ return 0;
+}