return -EINVAL;
req = mbox_alloc_msg_cpt_lf_alloc(mbox);
+ if (!req)
+ return -ENOSPC;
+
req->nix_pf_func = 0;
if (inl_dev_sso && nix_inl_dev_pffunc_get())
req->sso_pf_func = nix_inl_dev_pffunc_get();
if (lf->nb_desc == 0 || lf->nb_desc > CPT_LF_MAX_NB_DESC)
lf->nb_desc = CPT_LF_DEFAULT_NB_DESC;
- /* Update nb_desc to next power of 2 to aid in pending queue checks */
- lf->nb_desc = plt_align32pow2(lf->nb_desc);
-
/* Allocate memory for instruction queue for CPT LF. */
iq_mem = plt_zmalloc(cpt_lf_iq_mem_calc(lf->nb_desc), ROC_ALIGN);
if (iq_mem == NULL)
{
union cpt_lf_ctx_flush reg;
- if (lf == NULL)
+ if (lf == NULL) {
+ plt_err("Could not trigger CTX flush");
return -ENOTSUP;
+ }
reg.u = 0;
reg.s.inval = inval;
void
roc_cpt_iq_disable(struct roc_cpt_lf *lf)
{
+ volatile union cpt_lf_q_grp_ptr grp_ptr = {.u = 0x0};
+ volatile union cpt_lf_inprog lf_inprog = {.u = 0x0};
union cpt_lf_ctl lf_ctl = {.u = 0x0};
- union cpt_lf_q_grp_ptr grp_ptr;
- union cpt_lf_inprog lf_inprog;
int timeout = 20;
int cnt;
plt_err("Couldn't allocate memory for result address");
return -ENOMEM;
}
- dptr = plt_zmalloc(sa_len, 0);
- if (!dptr) {
+
+ dptr = plt_zmalloc(sa_len, 8);
+ if (dptr == NULL) {
plt_err("Couldn't allocate memory for SA dptr");
plt_free(res);
return -ENOMEM;
}
+
for (i = 0; i < (sa_len / 8); i++)
dptr[i] = plt_cpu_to_be_64(((uint64_t *)sa_dptr)[i]);
plt_delay_ms(1);
plt_free(res);
+ plt_free(dptr);
return 0;
}