nix_dump(" vwqe_wait_tmo = %ld", rq->vwqe_wait_tmo);
nix_dump(" vwqe_aura_handle = %ld", rq->vwqe_aura_handle);
nix_dump(" roc_nix = %p", rq->roc_nix);
+ nix_dump(" inl_dev_ref = %d", rq->inl_dev_ref);
}
void
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct dev *dev = &nix->dev;
+ int i;
nix_dump("nix@%p", nix);
nix_dump(" pf = %d", dev_get_pf(dev->pf_func));
nix_dump(" port_id = %d", roc_nix->port_id);
nix_dump(" rss_tag_as_xor = %d", roc_nix->rss_tag_as_xor);
nix_dump(" rss_tag_as_xor = %d", roc_nix->max_sqb_count);
+ nix_dump(" outb_nb_desc = %u", roc_nix->outb_nb_desc);
nix_dump(" \tpci_dev = %p", nix->pci_dev);
nix_dump(" \tbase = 0x%" PRIxPTR "", nix->base);
nix_dump(" \ttx_link = %d", nix->tx_link);
nix_dump(" \tsqb_size = %d", nix->sqb_size);
nix_dump(" \tmsixoff = %d", nix->msixoff);
+ for (i = 0; i < nix->nb_cpt_lf; i++)
+ nix_dump(" \tcpt_msixoff[%d] = %d", i, nix->cpt_msixoff[i]);
nix_dump(" \tcints = %d", nix->cints);
nix_dump(" \tqints = %d", nix->qints);
nix_dump(" \tsdp_link = %d", nix->sdp_link);
nix_dump(" \tptp_en = %d", nix->ptp_en);
nix_dump(" \trss_alg_idx = %d", nix->rss_alg_idx);
nix_dump(" \ttx_pause = %d", nix->tx_pause);
+ nix_dump(" \tinl_inb_ena = %d", nix->inl_inb_ena);
+ nix_dump(" \tinl_outb_ena = %d", nix->inl_outb_ena);
+ nix_dump(" \tinb_sa_base = 0x%p", nix->inb_sa_base);
+ nix_dump(" \tinb_sa_sz = %" PRIu64, nix->inb_sa_sz);
+ nix_dump(" \toutb_sa_base = 0x%p", nix->outb_sa_base);
+ nix_dump(" \toutb_sa_sz = %" PRIu64, nix->outb_sa_sz);
+ nix_dump(" \toutb_err_sso_pffunc = 0x%x", nix->outb_err_sso_pffunc);
+ nix_dump(" \tcpt_lf_base = 0x%p", nix->cpt_lf_base);
+ nix_dump(" \tnb_cpt_lf = %d", nix->nb_cpt_lf);
+ nix_dump(" \tinb_inl_dev = %d", nix->inb_inl_dev);
+}
+
+void
+roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev)
+{
+ struct nix_inl_dev *inl_dev =
+ (struct nix_inl_dev *)&roc_inl_dev->reserved;
+ struct dev *dev = &inl_dev->dev;
+
+ nix_dump("nix_inl_dev@%p", inl_dev);
+ nix_dump(" pf = %d", dev_get_pf(dev->pf_func));
+ nix_dump(" vf = %d", dev_get_vf(dev->pf_func));
+ nix_dump(" bar2 = 0x%" PRIx64, dev->bar2);
+ nix_dump(" bar4 = 0x%" PRIx64, dev->bar4);
+
+ nix_dump(" \tpci_dev = %p", inl_dev->pci_dev);
+ nix_dump(" \tnix_base = 0x%" PRIxPTR "", inl_dev->nix_base);
+ nix_dump(" \tsso_base = 0x%" PRIxPTR "", inl_dev->sso_base);
+ nix_dump(" \tssow_base = 0x%" PRIxPTR "", inl_dev->ssow_base);
+ nix_dump(" \tnix_msixoff = %d", inl_dev->nix_msixoff);
+ nix_dump(" \tsso_msixoff = %d", inl_dev->sso_msixoff);
+ nix_dump(" \tssow_msixoff = %d", inl_dev->ssow_msixoff);
+ nix_dump(" \tnix_cints = %d", inl_dev->cints);
+ nix_dump(" \tnix_qints = %d", inl_dev->qints);
+ nix_dump(" \trq_refs = %d", inl_dev->rq_refs);
+ nix_dump(" \tinb_sa_base = 0x%p", inl_dev->inb_sa_base);
+ nix_dump(" \tinb_sa_sz = %d", inl_dev->inb_sa_sz);
+ nix_dump(" \txaq_buf_size = %u", inl_dev->xaq_buf_size);
+ nix_dump(" \txae_waes = %u", inl_dev->xae_waes);
+ nix_dump(" \tiue = %u", inl_dev->iue);
+ nix_dump(" \txaq_aura = 0x%" PRIx64, inl_dev->xaq_aura);
+ nix_dump(" \txaq_mem = 0x%p", inl_dev->xaq_mem);
+
+ nix_dump(" \tinl_dev_rq:");
+ roc_nix_rq_dump(&inl_dev->rq);
}