NIX_REG_INFO(NIX_LF_SEND_ERR_DBG),
};
+static void
+nix_bitmap_dump(struct plt_bitmap *bmp)
+{
+ uint32_t pos = 0, start_pos;
+ uint64_t slab = 0;
+ int i;
+
+ plt_bitmap_scan_init(bmp);
+ plt_bitmap_scan(bmp, &pos, &slab);
+ start_pos = pos;
+
+ nix_dump_no_nl(" \t\t[");
+ do {
+ if (!slab)
+ break;
+ i = 0;
+
+ for (i = 0; i < 64; i++)
+ if (slab & (1ULL << i))
+ nix_dump_no_nl("%d, ", i);
+
+ if (!plt_bitmap_scan(bmp, &pos, &slab))
+ break;
+ } while (start_pos != pos);
+ nix_dump_no_nl(" ]");
+}
+
int
roc_nix_lf_get_reg_count(struct roc_nix *roc_nix)
{
nix_dump(" fc = %p", sq->fc);
};
+static uint8_t
+nix_tm_reg_dump_prep(uint16_t hw_lvl, uint16_t schq, uint16_t link,
+ uint64_t *reg, char regstr[][NIX_REG_NAME_SZ])
+{
+ uint8_t k = 0;
+
+ switch (hw_lvl) {
+ case NIX_TXSCH_LVL_SMQ:
+ reg[k] = NIX_AF_SMQX_CFG(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_SMQ[%u]_CFG",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_MDQ[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_MDQX_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL4:
+ reg[k] = NIX_AF_TL4X_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL4[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL4X_SDP_LINK_CFG(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL4[%u]_SDP_LINK_CFG", schq);
+
+ reg[k] = NIX_AF_TL4X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL4[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL4X_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL3:
+ reg[k] = NIX_AF_TL3X_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, link);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3_TL2[%u]_LINK[%u]_CFG", schq, link);
+
+ reg[k] = NIX_AF_TL3X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL3X_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL2:
+ reg[k] = NIX_AF_TL2X_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL2[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, link);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3_TL2[%u]_LINK[%u]_CFG", schq, link);
+
+ reg[k] = NIX_AF_TL2X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL2[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL2X_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL1:
+
+ reg[k] = NIX_AF_TL1X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL1[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL1X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL1[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL1X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL1[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL1X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL1[%u]_SW_XOFF",
+ schq);
+
+ reg[k] = NIX_AF_TL1X_DROPPED_PACKETS(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL1[%u]_DROPPED_PACKETS", schq);
+ break;
+ default:
+ break;
+ }
+
+ if (k > MAX_REGS_PER_MBOX_MSG) {
+ nix_dump("\t!!!NIX TM Registers request overflow!!!");
+ return 0;
+ }
+ return k;
+}
+
+static void
+nix_tm_dump_lvl(struct nix *nix, struct nix_tm_node_list *list, uint8_t hw_lvl)
+{
+ char regstr[MAX_REGS_PER_MBOX_MSG * 2][NIX_REG_NAME_SZ];
+ uint64_t reg[MAX_REGS_PER_MBOX_MSG * 2];
+ struct mbox *mbox = (&nix->dev)->mbox;
+ struct nix_txschq_config *req, *rsp;
+ const char *lvlstr, *parent_lvlstr;
+ struct nix_tm_node *node, *parent;
+ struct nix_tm_node *root = NULL;
+ uint32_t schq, parent_schq;
+ bool found = false;
+ uint8_t j, k, rc;
+
+ TAILQ_FOREACH(node, list, node) {
+ if (node->hw_lvl != hw_lvl)
+ continue;
+
+ found = true;
+ parent = node->parent;
+ if (hw_lvl == NIX_TXSCH_LVL_CNT) {
+ lvlstr = "SQ";
+ schq = node->id;
+ } else {
+ lvlstr = nix_tm_hwlvl2str(node->hw_lvl);
+ schq = node->hw_id;
+ }
+
+ if (parent) {
+ parent_schq = parent->hw_id;
+ parent_lvlstr = nix_tm_hwlvl2str(parent->hw_lvl);
+ } else if (node->hw_lvl == NIX_TXSCH_LVL_TL1) {
+ parent_schq = nix->tx_link;
+ parent_lvlstr = "LINK";
+ } else {
+ parent_schq = node->parent_hw_id;
+ parent_lvlstr = nix_tm_hwlvl2str(node->hw_lvl + 1);
+ }
+
+ nix_dump("\t(%p%s) %s_%d->%s_%d", node,
+ node->child_realloc ? "[CR]" : "", lvlstr, schq,
+ parent_lvlstr, parent_schq);
+
+ if (!(node->flags & NIX_TM_NODE_HWRES))
+ continue;
+
+ /* Need to dump TL1 when root is TL2 */
+ if (node->hw_lvl == nix->tm_root_lvl)
+ root = node;
+
+ /* Dump registers only when HWRES is present */
+ k = nix_tm_reg_dump_prep(node->hw_lvl, schq, nix->tx_link, reg,
+ regstr);
+ if (!k)
+ continue;
+
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+ req->read = 1;
+ req->lvl = node->hw_lvl;
+ req->num_regs = k;
+ mbox_memcpy(req->reg, reg, sizeof(uint64_t) * k);
+ rc = mbox_process_msg(mbox, (void **)&rsp);
+ if (!rc) {
+ for (j = 0; j < k; j++)
+ nix_dump("\t\t%s=0x%016" PRIx64, regstr[j],
+ rsp->regval[j]);
+ } else {
+ nix_dump("\t!!!Failed to dump registers!!!");
+ }
+ }
+
+ if (found)
+ nix_dump("\n");
+
+ /* Dump TL1 node data when root level is TL2 */
+ if (root && root->hw_lvl == NIX_TXSCH_LVL_TL2) {
+ k = nix_tm_reg_dump_prep(NIX_TXSCH_LVL_TL1, root->parent_hw_id,
+ nix->tx_link, reg, regstr);
+ if (!k)
+ return;
+
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+ req->read = 1;
+ req->lvl = NIX_TXSCH_LVL_TL1;
+ req->num_regs = k;
+ mbox_memcpy(req->reg, reg, sizeof(uint64_t) * k);
+ rc = mbox_process_msg(mbox, (void **)&rsp);
+ if (!rc) {
+ for (j = 0; j < k; j++)
+ nix_dump("\t\t%s=0x%016" PRIx64, regstr[j],
+ rsp->regval[j]);
+ } else {
+ nix_dump("\t!!!Failed to dump registers!!!");
+ }
+ nix_dump("\n");
+ }
+}
+
+void
+roc_nix_tm_dump(struct roc_nix *roc_nix)
+{
+ struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ struct dev *dev = &nix->dev;
+ uint8_t hw_lvl, i;
+
+ nix_dump("===TM hierarchy and registers dump of %s (pf:vf) (%d:%d)===",
+ nix->pci_dev->name, dev_get_pf(dev->pf_func),
+ dev_get_vf(dev->pf_func));
+
+ /* Dump all trees */
+ for (i = 0; i < ROC_NIX_TM_TREE_MAX; i++) {
+ nix_dump("\tTM %s:", nix_tm_tree2str(i));
+ for (hw_lvl = 0; hw_lvl <= NIX_TXSCH_LVL_CNT; hw_lvl++)
+ nix_tm_dump_lvl(nix, &nix->trees[i], hw_lvl);
+ }
+
+ /* Dump unused resources */
+ nix_dump("\tTM unused resources:");
+ hw_lvl = NIX_TXSCH_LVL_SMQ;
+ for (; hw_lvl < NIX_TXSCH_LVL_CNT; hw_lvl++) {
+ nix_dump("\t\ttxschq %7s num = %d",
+ nix_tm_hwlvl2str(hw_lvl),
+ nix_tm_resource_avail(nix, hw_lvl, false));
+
+ nix_bitmap_dump(nix->schq_bmp[hw_lvl]);
+ nix_dump("\n");
+
+ nix_dump("\t\ttxschq_contig %7s num = %d",
+ nix_tm_hwlvl2str(hw_lvl),
+ nix_tm_resource_avail(nix, hw_lvl, true));
+ nix_bitmap_dump(nix->schq_contig_bmp[hw_lvl]);
+ nix_dump("\n");
+ }
+}
+
void
roc_nix_dump(struct roc_nix *roc_nix)
{
nix_dump(" \tnb_tx_queues = %d", nix->nb_tx_queues);
nix_dump(" \tlso_tsov6_idx = %d", nix->lso_tsov6_idx);
nix_dump(" \tlso_tsov4_idx = %d", nix->lso_tsov4_idx);
+ nix_dump(" \tlso_udp_tun_v4v4 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V4]);
+ nix_dump(" \tlso_udp_tun_v4v6 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V6]);
+ nix_dump(" \tlso_udp_tun_v6v4 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V4]);
+ nix_dump(" \tlso_udp_tun_v6v6 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V6]);
+ nix_dump(" \tlso_tun_v4v4 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V4]);
+ nix_dump(" \tlso_tun_v4v6 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V6]);
+ nix_dump(" \tlso_tun_v6v4 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V4]);
+ nix_dump(" \tlso_tun_v6v6 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V6]);
nix_dump(" \tlf_rx_stats = %d", nix->lf_rx_stats);
nix_dump(" \tlf_tx_stats = %d", nix->lf_tx_stats);
nix_dump(" \trx_chan_cnt = %d", nix->rx_chan_cnt);
git.droids-corp.org / dpdk.git / blobdiff