#include "roc_api.h"
#include "roc_priv.h"
-#define nix_dump(fmt, ...) fprintf(stderr, fmt "\n", ##__VA_ARGS__)
+#define nix_dump plt_dump
#define NIX_REG_INFO(reg) \
{ \
reg, #reg \
}
#define NIX_REG_NAME_SZ 48
-#define nix_dump_no_nl(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__)
+#define nix_dump_no_nl plt_dump_no_nl
struct nix_lf_reg_info {
uint32_t offset;
NIX_REG_INFO(NIX_LF_SEND_ERR_DBG),
};
+static void
+nix_bitmap_dump(struct plt_bitmap *bmp)
+{
+ uint32_t pos = 0, start_pos;
+ uint64_t slab = 0;
+ int i;
+
+ plt_bitmap_scan_init(bmp);
+ plt_bitmap_scan(bmp, &pos, &slab);
+ start_pos = pos;
+
+ nix_dump_no_nl(" \t\t[");
+ do {
+ if (!slab)
+ break;
+ i = 0;
+
+ for (i = 0; i < 64; i++)
+ if (slab & (1ULL << i))
+ nix_dump_no_nl("%d, ", i);
+
+ if (!plt_bitmap_scan(bmp, &pos, &slab))
+ break;
+ } while (start_pos != pos);
+ nix_dump_no_nl(" ]");
+}
+
int
roc_nix_lf_get_reg_count(struct roc_nix *roc_nix)
{
}
int
-roc_nix_lf_reg_dump(struct roc_nix *roc_nix, uint64_t *data)
+nix_lf_gen_reg_dump(uintptr_t nix_lf_base, uint64_t *data)
{
- struct nix *nix = roc_nix_to_nix_priv(roc_nix);
- uintptr_t nix_lf_base = nix->base;
bool dump_stdout;
uint64_t reg;
uint32_t i;
- if (roc_nix == NULL)
- return NIX_ERR_PARAM;
-
dump_stdout = data ? 0 : 1;
for (i = 0; i < PLT_DIM(nix_lf_reg); i++) {
*data++ = reg;
}
+ return i;
+}
+
+int
+nix_lf_stat_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint8_t lf_tx_stats,
+ uint8_t lf_rx_stats)
+{
+ uint32_t i, count = 0;
+ bool dump_stdout;
+ uint64_t reg;
+
+ dump_stdout = data ? 0 : 1;
+
/* NIX_LF_TX_STATX */
- for (i = 0; i < nix->lf_tx_stats; i++) {
+ for (i = 0; i < lf_tx_stats; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_TX_STATX(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_TX_STATX", i,
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_RX_STATX */
- for (i = 0; i < nix->lf_rx_stats; i++) {
+ for (i = 0; i < lf_rx_stats; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_RX_STATX(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_RX_STATX", i,
*data++ = reg;
}
+ return count + i;
+}
+
+int
+nix_lf_int_reg_dump(uintptr_t nix_lf_base, uint64_t *data, uint16_t qints,
+ uint16_t cints)
+{
+ uint32_t i, count = 0;
+ bool dump_stdout;
+ uint64_t reg;
+
+ dump_stdout = data ? 0 : 1;
+
/* NIX_LF_QINTX_CNT*/
- for (i = 0; i < nix->qints; i++) {
+ for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_CNT(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_CNT", i,
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_QINTX_INT */
- for (i = 0; i < nix->qints; i++) {
+ for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_INT(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_INT", i,
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_QINTX_ENA_W1S */
- for (i = 0; i < nix->qints; i++) {
+ for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_ENA_W1S(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_ENA_W1S",
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_QINTX_ENA_W1C */
- for (i = 0; i < nix->qints; i++) {
+ for (i = 0; i < qints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_QINTX_ENA_W1C(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_QINTX_ENA_W1C",
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_CINTX_CNT */
- for (i = 0; i < nix->cints; i++) {
+ for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_CNT(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_CNT", i,
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_CINTX_WAIT */
- for (i = 0; i < nix->cints; i++) {
+ for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_WAIT(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_WAIT", i,
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_CINTX_INT */
- for (i = 0; i < nix->cints; i++) {
+ for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_INT(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_INT", i,
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_CINTX_INT_W1S */
- for (i = 0; i < nix->cints; i++) {
+ for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_INT_W1S(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_INT_W1S",
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_CINTX_ENA_W1S */
- for (i = 0; i < nix->cints; i++) {
+ for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_ENA_W1S(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_ENA_W1S",
if (data)
*data++ = reg;
}
+ count += i;
/* NIX_LF_CINTX_ENA_W1C */
- for (i = 0; i < nix->cints; i++) {
+ for (i = 0; i < cints; i++) {
reg = plt_read64(nix_lf_base + NIX_LF_CINTX_ENA_W1C(i));
if (dump_stdout && reg)
nix_dump("%32s_%d = 0x%" PRIx64, "NIX_LF_CINTX_ENA_W1C",
if (data)
*data++ = reg;
}
+
+ return count + i;
+}
+
+int
+roc_nix_lf_reg_dump(struct roc_nix *roc_nix, uint64_t *data)
+{
+ struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ bool dump_stdout = data ? 0 : 1;
+ uintptr_t nix_base;
+ uint32_t i;
+
+ if (roc_nix == NULL)
+ return NIX_ERR_PARAM;
+
+ nix_base = nix->base;
+ /* General registers */
+ i = nix_lf_gen_reg_dump(nix_base, data);
+
+ /* Rx, Tx stat registers */
+ i += nix_lf_stat_reg_dump(nix_base, dump_stdout ? NULL : &data[i],
+ nix->lf_tx_stats, nix->lf_rx_stats);
+
+ /* Intr registers */
+ i += nix_lf_int_reg_dump(nix_base, dump_stdout ? NULL : &data[i],
+ nix->qints, nix->cints);
+
return 0;
}
-static int
-nix_q_ctx_get(struct mbox *mbox, uint8_t ctype, uint16_t qid, __io void **ctx_p)
+int
+nix_q_ctx_get(struct dev *dev, uint8_t ctype, uint16_t qid, __io void **ctx_p)
{
+ struct mbox *mbox = dev->mbox;
int rc;
if (roc_model_is_cn9k()) {
int rc;
aq = mbox_alloc_msg_nix_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = ctype;
aq->op = NIX_AQ_INSTOP_READ;
struct nix_cn10k_aq_enq_req *aq;
aq = mbox_alloc_msg_nix_cn10k_aq_enq(mbox);
+ if (!aq)
+ return -ENOSPC;
+
aq->qidx = qid;
aq->ctype = ctype;
aq->op = NIX_AQ_INSTOP_READ;
nix_dump("W10: re_pkts \t\t\t0x%" PRIx64 "\n", (uint64_t)ctx->re_pkts);
}
-static inline void
+void
nix_lf_rq_dump(__io struct nix_cn10k_rq_ctx_s *ctx)
{
nix_dump("W0: wqe_aura \t\t\t%d\nW0: len_ol3_dis \t\t\t%d",
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
int rc = -1, q, rq = nix->nb_rx_queues;
- struct mbox *mbox = (&nix->dev)->mbox;
struct npa_aq_enq_rsp *npa_rsp;
struct npa_aq_enq_req *npa_aq;
- volatile void *ctx;
+ struct dev *dev = &nix->dev;
int sq = nix->nb_tx_queues;
struct npa_lf *npa_lf;
+ volatile void *ctx;
uint32_t sqb_aura;
npa_lf = idev_npa_obj_get();
return NPA_ERR_DEVICE_NOT_BOUNDED;
for (q = 0; q < rq; q++) {
- rc = nix_q_ctx_get(mbox, NIX_AQ_CTYPE_CQ, q, &ctx);
+ rc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_CQ, q, &ctx);
if (rc) {
plt_err("Failed to get cq context");
goto fail;
}
for (q = 0; q < rq; q++) {
- rc = nix_q_ctx_get(mbox, NIX_AQ_CTYPE_RQ, q, &ctx);
+ rc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_RQ, q, &ctx);
if (rc) {
plt_err("Failed to get rq context");
goto fail;
}
for (q = 0; q < sq; q++) {
- rc = nix_q_ctx_get(mbox, NIX_AQ_CTYPE_SQ, q, &ctx);
+ rc = nix_q_ctx_get(dev, NIX_AQ_CTYPE_SQ, q, &ctx);
if (rc) {
plt_err("Failed to get sq context");
goto fail;
{
const union nix_rx_parse_u *rx =
(const union nix_rx_parse_u *)((const uint64_t *)cq + 1);
+ const uint64_t *sgs = (const uint64_t *)(rx + 1);
+ int i;
nix_dump("tag \t\t0x%x\tq \t\t%d\t\tnode \t\t%d\tcqe_type \t%d",
cq->tag, cq->q, cq->node, cq->cqe_type);
- nix_dump("W0: chan \t%d\t\tdesc_sizem1 \t%d", rx->chan,
+ nix_dump("W0: chan \t0x%x\t\tdesc_sizem1 \t%d", rx->chan,
rx->desc_sizem1);
nix_dump("W0: imm_copy \t%d\t\texpress \t%d", rx->imm_copy,
rx->express);
nix_dump("W5: vtag0_ptr \t%d\t\tvtag1_ptr \t%d\t\tflow_key_alg \t%d",
rx->vtag0_ptr, rx->vtag1_ptr, rx->flow_key_alg);
+
+ for (i = 0; i < (rx->desc_sizem1 + 1) << 1; i++)
+ nix_dump("sg[%u] = %p", i, (void *)sgs[i]);
}
void
nix_dump(" vwqe_wait_tmo = %ld", rq->vwqe_wait_tmo);
nix_dump(" vwqe_aura_handle = %ld", rq->vwqe_aura_handle);
nix_dump(" roc_nix = %p", rq->roc_nix);
+ nix_dump(" inl_dev_ref = %d", rq->inl_dev_ref);
}
void
nix_dump(" fc = %p", sq->fc);
};
+static uint8_t
+nix_tm_reg_dump_prep(uint16_t hw_lvl, uint16_t schq, uint16_t link,
+ uint64_t *reg, char regstr[][NIX_REG_NAME_SZ])
+{
+ uint8_t k = 0;
+
+ switch (hw_lvl) {
+ case NIX_TXSCH_LVL_SMQ:
+ reg[k] = NIX_AF_SMQX_CFG(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_SMQ[%u]_CFG",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_MDQ[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_MDQX_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_MDQX_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_MDQ[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL4:
+ reg[k] = NIX_AF_TL4X_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL4[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL4X_SDP_LINK_CFG(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL4[%u]_SDP_LINK_CFG", schq);
+
+ reg[k] = NIX_AF_TL4X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL4[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL4X_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_TL4X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL4[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL3:
+ reg[k] = NIX_AF_TL3X_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, link);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3_TL2[%u]_LINK[%u]_CFG", schq, link);
+
+ reg[k] = NIX_AF_TL3X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL3X_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_TL3X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL3[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL2:
+ reg[k] = NIX_AF_TL2X_PARENT(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_PARENT",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL2[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL3_TL2X_LINKX_CFG(schq, link);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL3_TL2[%u]_LINK[%u]_CFG", schq, link);
+
+ reg[k] = NIX_AF_TL2X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL2[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL2X_PIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_PIR",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_SHAPE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_SHAPE",
+ schq);
+
+ reg[k] = NIX_AF_TL2X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL2[%u]_SW_XOFF",
+ schq);
+ break;
+ case NIX_TXSCH_LVL_TL1:
+
+ reg[k] = NIX_AF_TL1X_TOPOLOGY(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL1[%u]_TOPOLOGY", schq);
+
+ reg[k] = NIX_AF_TL1X_SCHEDULE(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL1[%u]_SCHEDULE", schq);
+
+ reg[k] = NIX_AF_TL1X_CIR(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL1[%u]_CIR",
+ schq);
+
+ reg[k] = NIX_AF_TL1X_SW_XOFF(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ, "NIX_AF_TL1[%u]_SW_XOFF",
+ schq);
+
+ reg[k] = NIX_AF_TL1X_DROPPED_PACKETS(schq);
+ snprintf(regstr[k++], NIX_REG_NAME_SZ,
+ "NIX_AF_TL1[%u]_DROPPED_PACKETS", schq);
+ break;
+ default:
+ break;
+ }
+
+ if (k > MAX_REGS_PER_MBOX_MSG) {
+ nix_dump("\t!!!NIX TM Registers request overflow!!!");
+ return 0;
+ }
+ return k;
+}
+
+static void
+nix_tm_dump_lvl(struct nix *nix, struct nix_tm_node_list *list, uint8_t hw_lvl)
+{
+ char regstr[MAX_REGS_PER_MBOX_MSG * 2][NIX_REG_NAME_SZ];
+ uint64_t reg[MAX_REGS_PER_MBOX_MSG * 2];
+ struct mbox *mbox = (&nix->dev)->mbox;
+ struct nix_txschq_config *req, *rsp;
+ const char *lvlstr, *parent_lvlstr;
+ struct nix_tm_node *node, *parent;
+ struct nix_tm_node *root = NULL;
+ uint32_t schq, parent_schq;
+ bool found = false;
+ uint8_t j, k, rc;
+
+ TAILQ_FOREACH(node, list, node) {
+ if (node->hw_lvl != hw_lvl)
+ continue;
+
+ found = true;
+ parent = node->parent;
+ if (hw_lvl == NIX_TXSCH_LVL_CNT) {
+ lvlstr = "SQ";
+ schq = node->id;
+ } else {
+ lvlstr = nix_tm_hwlvl2str(node->hw_lvl);
+ schq = node->hw_id;
+ }
+
+ if (parent) {
+ parent_schq = parent->hw_id;
+ parent_lvlstr = nix_tm_hwlvl2str(parent->hw_lvl);
+ } else if (node->hw_lvl == NIX_TXSCH_LVL_TL1) {
+ parent_schq = nix->tx_link;
+ parent_lvlstr = "LINK";
+ } else {
+ parent_schq = node->parent_hw_id;
+ parent_lvlstr = nix_tm_hwlvl2str(node->hw_lvl + 1);
+ }
+
+ nix_dump("\t(%p%s) %s_%d->%s_%d", node,
+ node->child_realloc ? "[CR]" : "", lvlstr, schq,
+ parent_lvlstr, parent_schq);
+
+ if (!(node->flags & NIX_TM_NODE_HWRES))
+ continue;
+
+ /* Need to dump TL1 when root is TL2 */
+ if (node->hw_lvl == nix->tm_root_lvl)
+ root = node;
+
+ /* Dump registers only when HWRES is present */
+ k = nix_tm_reg_dump_prep(node->hw_lvl, schq, nix->tx_link, reg,
+ regstr);
+ if (!k)
+ continue;
+
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+ req->read = 1;
+ req->lvl = node->hw_lvl;
+ req->num_regs = k;
+ mbox_memcpy(req->reg, reg, sizeof(uint64_t) * k);
+ rc = mbox_process_msg(mbox, (void **)&rsp);
+ if (!rc) {
+ for (j = 0; j < k; j++)
+ nix_dump("\t\t%s=0x%016" PRIx64, regstr[j],
+ rsp->regval[j]);
+ } else {
+ nix_dump("\t!!!Failed to dump registers!!!");
+ }
+ }
+
+ if (found)
+ nix_dump("\n");
+
+ /* Dump TL1 node data when root level is TL2 */
+ if (root && root->hw_lvl == NIX_TXSCH_LVL_TL2) {
+ k = nix_tm_reg_dump_prep(NIX_TXSCH_LVL_TL1, root->parent_hw_id,
+ nix->tx_link, reg, regstr);
+ if (!k)
+ return;
+
+ req = mbox_alloc_msg_nix_txschq_cfg(mbox);
+ req->read = 1;
+ req->lvl = NIX_TXSCH_LVL_TL1;
+ req->num_regs = k;
+ mbox_memcpy(req->reg, reg, sizeof(uint64_t) * k);
+ rc = mbox_process_msg(mbox, (void **)&rsp);
+ if (!rc) {
+ for (j = 0; j < k; j++)
+ nix_dump("\t\t%s=0x%016" PRIx64, regstr[j],
+ rsp->regval[j]);
+ } else {
+ nix_dump("\t!!!Failed to dump registers!!!");
+ }
+ nix_dump("\n");
+ }
+}
+
+void
+roc_nix_tm_dump(struct roc_nix *roc_nix)
+{
+ struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ struct dev *dev = &nix->dev;
+ uint8_t hw_lvl, i;
+
+ nix_dump("===TM hierarchy and registers dump of %s (pf:vf) (%d:%d)===",
+ nix->pci_dev->name, dev_get_pf(dev->pf_func),
+ dev_get_vf(dev->pf_func));
+
+ /* Dump all trees */
+ for (i = 0; i < ROC_NIX_TM_TREE_MAX; i++) {
+ nix_dump("\tTM %s:", nix_tm_tree2str(i));
+ for (hw_lvl = 0; hw_lvl <= NIX_TXSCH_LVL_CNT; hw_lvl++)
+ nix_tm_dump_lvl(nix, &nix->trees[i], hw_lvl);
+ }
+
+ /* Dump unused resources */
+ nix_dump("\tTM unused resources:");
+ hw_lvl = NIX_TXSCH_LVL_SMQ;
+ for (; hw_lvl < NIX_TXSCH_LVL_CNT; hw_lvl++) {
+ nix_dump("\t\ttxschq %7s num = %d",
+ nix_tm_hwlvl2str(hw_lvl),
+ nix_tm_resource_avail(nix, hw_lvl, false));
+
+ nix_bitmap_dump(nix->schq_bmp[hw_lvl]);
+ nix_dump("\n");
+
+ nix_dump("\t\ttxschq_contig %7s num = %d",
+ nix_tm_hwlvl2str(hw_lvl),
+ nix_tm_resource_avail(nix, hw_lvl, true));
+ nix_bitmap_dump(nix->schq_contig_bmp[hw_lvl]);
+ nix_dump("\n");
+ }
+}
+
void
roc_nix_dump(struct roc_nix *roc_nix)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
struct dev *dev = &nix->dev;
+ int i;
nix_dump("nix@%p", nix);
nix_dump(" pf = %d", dev_get_pf(dev->pf_func));
nix_dump(" port_id = %d", roc_nix->port_id);
nix_dump(" rss_tag_as_xor = %d", roc_nix->rss_tag_as_xor);
nix_dump(" rss_tag_as_xor = %d", roc_nix->max_sqb_count);
+ nix_dump(" outb_nb_desc = %u", roc_nix->outb_nb_desc);
nix_dump(" \tpci_dev = %p", nix->pci_dev);
nix_dump(" \tbase = 0x%" PRIxPTR "", nix->base);
nix_dump(" \tnb_tx_queues = %d", nix->nb_tx_queues);
nix_dump(" \tlso_tsov6_idx = %d", nix->lso_tsov6_idx);
nix_dump(" \tlso_tsov4_idx = %d", nix->lso_tsov4_idx);
+ nix_dump(" \tlso_udp_tun_v4v4 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V4]);
+ nix_dump(" \tlso_udp_tun_v4v6 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V4V6]);
+ nix_dump(" \tlso_udp_tun_v6v4 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V4]);
+ nix_dump(" \tlso_udp_tun_v6v6 = %d",
+ nix->lso_udp_tun_idx[ROC_NIX_LSO_TUN_V6V6]);
+ nix_dump(" \tlso_tun_v4v4 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V4]);
+ nix_dump(" \tlso_tun_v4v6 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V4V6]);
+ nix_dump(" \tlso_tun_v6v4 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V4]);
+ nix_dump(" \tlso_tun_v6v6 = %d",
+ nix->lso_tun_idx[ROC_NIX_LSO_TUN_V6V6]);
nix_dump(" \tlf_rx_stats = %d", nix->lf_rx_stats);
nix_dump(" \tlf_tx_stats = %d", nix->lf_tx_stats);
nix_dump(" \trx_chan_cnt = %d", nix->rx_chan_cnt);
nix_dump(" \ttx_link = %d", nix->tx_link);
nix_dump(" \tsqb_size = %d", nix->sqb_size);
nix_dump(" \tmsixoff = %d", nix->msixoff);
+ for (i = 0; i < nix->nb_cpt_lf; i++)
+ nix_dump(" \tcpt_msixoff[%d] = %d", i, nix->cpt_msixoff[i]);
nix_dump(" \tcints = %d", nix->cints);
nix_dump(" \tqints = %d", nix->qints);
nix_dump(" \tsdp_link = %d", nix->sdp_link);
nix_dump(" \tptp_en = %d", nix->ptp_en);
nix_dump(" \trss_alg_idx = %d", nix->rss_alg_idx);
nix_dump(" \ttx_pause = %d", nix->tx_pause);
+ nix_dump(" \tinl_inb_ena = %d", nix->inl_inb_ena);
+ nix_dump(" \tinl_outb_ena = %d", nix->inl_outb_ena);
+ nix_dump(" \tinb_sa_base = 0x%p", nix->inb_sa_base);
+ nix_dump(" \tinb_sa_sz = %" PRIu64, nix->inb_sa_sz);
+ nix_dump(" \toutb_sa_base = 0x%p", nix->outb_sa_base);
+ nix_dump(" \toutb_sa_sz = %" PRIu64, nix->outb_sa_sz);
+ nix_dump(" \toutb_err_sso_pffunc = 0x%x", nix->outb_err_sso_pffunc);
+ nix_dump(" \tcpt_lf_base = 0x%p", nix->cpt_lf_base);
+ nix_dump(" \tnb_cpt_lf = %d", nix->nb_cpt_lf);
+ nix_dump(" \tinb_inl_dev = %d", nix->inb_inl_dev);
+}
+
+void
+roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev)
+{
+ struct nix_inl_dev *inl_dev =
+ (struct nix_inl_dev *)&roc_inl_dev->reserved;
+ struct dev *dev = &inl_dev->dev;
+
+ nix_dump("nix_inl_dev@%p", inl_dev);
+ nix_dump(" pf = %d", dev_get_pf(dev->pf_func));
+ nix_dump(" vf = %d", dev_get_vf(dev->pf_func));
+ nix_dump(" bar2 = 0x%" PRIx64, dev->bar2);
+ nix_dump(" bar4 = 0x%" PRIx64, dev->bar4);
+
+ nix_dump(" \tpci_dev = %p", inl_dev->pci_dev);
+ nix_dump(" \tnix_base = 0x%" PRIxPTR "", inl_dev->nix_base);
+ nix_dump(" \tsso_base = 0x%" PRIxPTR "", inl_dev->sso_base);
+ nix_dump(" \tssow_base = 0x%" PRIxPTR "", inl_dev->ssow_base);
+ nix_dump(" \tnix_msixoff = %d", inl_dev->nix_msixoff);
+ nix_dump(" \tsso_msixoff = %d", inl_dev->sso_msixoff);
+ nix_dump(" \tssow_msixoff = %d", inl_dev->ssow_msixoff);
+ nix_dump(" \tnix_cints = %d", inl_dev->cints);
+ nix_dump(" \tnix_qints = %d", inl_dev->qints);
+ nix_dump(" \trq_refs = %d", inl_dev->rq_refs);
+ nix_dump(" \tinb_sa_base = 0x%p", inl_dev->inb_sa_base);
+ nix_dump(" \tinb_sa_sz = %d", inl_dev->inb_sa_sz);
+ nix_dump(" \txaq_buf_size = %u", inl_dev->xaq_buf_size);
+ nix_dump(" \txae_waes = %u", inl_dev->xae_waes);
+ nix_dump(" \tiue = %u", inl_dev->iue);
+ nix_dump(" \txaq_aura = 0x%" PRIx64, inl_dev->xaq.aura_handle);
+ nix_dump(" \txaq_mem = 0x%p", inl_dev->xaq.mem);
+
+ nix_dump(" \tinl_dev_rq:");
+ roc_nix_rq_dump(&inl_dev->rq);
}
git.droids-corp.org / dpdk.git / blobdiff