/* Alignment of SA Base */
#define ROC_NIX_INL_SA_BASE_ALIGN BIT_ULL(16)
+#define ROC_NIX_INL_SA_SOFT_EXP_ERR_MAX_POLL_COUNT 25
+
+#define ROC_NIX_SOFT_EXP_ERR_RING_MAX_ENTRY_LOG2 16
+
+#define ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS 4
+
+#define ROC_NIX_MAX_TOTAL_OUTB_IPSEC_SA \
+ (ROC_IPSEC_ERR_RING_MAX_ENTRY * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS)
+
+#define ROC_NIX_INL_MAX_SOFT_EXP_RNGS \
+ (PLT_MAX_ETHPORTS * ROC_NIX_SOFT_EXP_PER_PORT_MAX_RINGS)
+
+/* Reassembly configuration */
+#define ROC_NIX_INL_REAS_ACTIVE_LIMIT 0xFFF
+#define ROC_NIX_INL_REAS_ACTIVE_THRESHOLD 10
+#define ROC_NIX_INL_REAS_ZOMBIE_LIMIT 0xFFF
+#define ROC_NIX_INL_REAS_ZOMBIE_THRESHOLD 10
+
+static inline struct roc_onf_ipsec_inb_sa *
+roc_nix_inl_onf_ipsec_inb_sa(uintptr_t base, uint64_t idx)
+{
+ uint64_t off = idx << ROC_NIX_INL_ONF_IPSEC_INB_SA_SZ_LOG2;
+
+ return PLT_PTR_ADD(base, off);
+}
+
+static inline struct roc_onf_ipsec_outb_sa *
+roc_nix_inl_onf_ipsec_outb_sa(uintptr_t base, uint64_t idx)
+{
+ uint64_t off = idx << ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2;
+
+ return PLT_PTR_ADD(base, off);
+}
+
+static inline void *
+roc_nix_inl_onf_ipsec_inb_sa_sw_rsvd(void *sa)
+{
+ return PLT_PTR_ADD(sa, ROC_NIX_INL_ONF_IPSEC_INB_HW_SZ);
+}
+
+static inline void *
+roc_nix_inl_onf_ipsec_outb_sa_sw_rsvd(void *sa)
+{
+ return PLT_PTR_ADD(sa, ROC_NIX_INL_ONF_IPSEC_OUTB_HW_SZ);
+}
+
+static inline struct roc_ot_ipsec_inb_sa *
+roc_nix_inl_ot_ipsec_inb_sa(uintptr_t base, uint64_t idx)
+{
+ uint64_t off = idx << ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2;
+
+ return PLT_PTR_ADD(base, off);
+}
+
+static inline struct roc_ot_ipsec_outb_sa *
+roc_nix_inl_ot_ipsec_outb_sa(uintptr_t base, uint64_t idx)
+{
+ uint64_t off = idx << ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ_LOG2;
+
+ return PLT_PTR_ADD(base, off);
+}
+
+static inline void *
+roc_nix_inl_ot_ipsec_inb_sa_sw_rsvd(void *sa)
+{
+ return PLT_PTR_ADD(sa, ROC_NIX_INL_OT_IPSEC_INB_HW_SZ);
+}
+
+static inline void *
+roc_nix_inl_ot_ipsec_outb_sa_sw_rsvd(void *sa)
+{
+ return PLT_PTR_ADD(sa, ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ);
+}
+
/* Inline device SSO Work callback */
-typedef void (*roc_nix_inl_sso_work_cb_t)(uint64_t *gw, void *args);
+typedef void (*roc_nix_inl_sso_work_cb_t)(uint64_t *gw, void *args,
+ uint32_t soft_exp_event);
struct roc_nix_inl_dev {
/* Input parameters */
struct plt_pci_device *pci_dev;
- uint16_t ipsec_in_max_spi;
+ uint32_t ipsec_in_min_spi;
+ uint32_t ipsec_in_max_spi;
bool selftest;
+ bool is_multi_channel;
+ uint16_t channel;
+ uint16_t chan_mask;
bool attach_cptlf;
+ bool wqe_skip;
+ uint8_t spb_drop_pc;
+ uint8_t lpb_drop_pc;
+ bool set_soft_exp_poll;
/* End of input parameters */
#define ROC_NIX_INL_MEM_SZ (1280)
int __roc_api roc_nix_inl_dev_init(struct roc_nix_inl_dev *roc_inl_dev);
int __roc_api roc_nix_inl_dev_fini(struct roc_nix_inl_dev *roc_inl_dev);
void __roc_api roc_nix_inl_dev_dump(struct roc_nix_inl_dev *roc_inl_dev);
+bool __roc_api roc_nix_inl_dev_is_probed(void);
+void __roc_api roc_nix_inl_dev_lock(void);
+void __roc_api roc_nix_inl_dev_unlock(void);
+int __roc_api roc_nix_inl_dev_xaq_realloc(uint64_t aura_handle);
+uint16_t __roc_api roc_nix_inl_dev_pffunc_get(void);
+
+/* NIX Inline Inbound API */
+int __roc_api roc_nix_inl_inb_init(struct roc_nix *roc_nix);
+int __roc_api roc_nix_inl_inb_fini(struct roc_nix *roc_nix);
+bool __roc_api roc_nix_inl_inb_is_enabled(struct roc_nix *roc_nix);
+uintptr_t __roc_api roc_nix_inl_inb_sa_base_get(struct roc_nix *roc_nix,
+ bool inl_dev_sa);
+uint32_t __roc_api roc_nix_inl_inb_spi_range(struct roc_nix *roc_nix,
+ bool inl_dev_sa, uint32_t *min,
+ uint32_t *max);
+uint32_t __roc_api roc_nix_inl_inb_sa_sz(struct roc_nix *roc_nix,
+ bool inl_dev_sa);
+uintptr_t __roc_api roc_nix_inl_inb_sa_get(struct roc_nix *roc_nix,
+ bool inl_dev_sa, uint32_t spi);
+void __roc_api roc_nix_inb_mode_set(struct roc_nix *roc_nix, bool use_inl_dev);
+int __roc_api roc_nix_inl_dev_rq_get(struct roc_nix_rq *rq);
+int __roc_api roc_nix_inl_dev_rq_put(struct roc_nix_rq *rq);
+bool __roc_api roc_nix_inb_is_with_inl_dev(struct roc_nix *roc_nix);
+struct roc_nix_rq *__roc_api roc_nix_inl_dev_rq(struct roc_nix *roc_nix);
+int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix,
+ uint32_t tag_const, uint8_t tt);
+int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,
+ uint16_t max_frags);
+int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,
+ bool inb_inl_dev);
+
+/* NIX Inline Outbound API */
+int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);
+int __roc_api roc_nix_inl_outb_fini(struct roc_nix *roc_nix);
+bool __roc_api roc_nix_inl_outb_is_enabled(struct roc_nix *roc_nix);
+uintptr_t __roc_api roc_nix_inl_outb_sa_base_get(struct roc_nix *roc_nix);
+struct roc_cpt_lf *__roc_api
+roc_nix_inl_outb_lf_base_get(struct roc_nix *roc_nix);
+uint16_t __roc_api roc_nix_inl_outb_sso_pffunc_get(struct roc_nix *roc_nix);
+int __roc_api roc_nix_inl_cb_register(roc_nix_inl_sso_work_cb_t cb, void *args);
+int __roc_api roc_nix_inl_cb_unregister(roc_nix_inl_sso_work_cb_t cb,
+ void *args);
+int __roc_api roc_nix_inl_outb_soft_exp_poll_switch(struct roc_nix *roc_nix,
+ bool poll);
+/* NIX Inline/Outbound API */
+enum roc_nix_inl_sa_sync_op {
+ ROC_NIX_INL_SA_OP_FLUSH,
+ ROC_NIX_INL_SA_OP_FLUSH_INVAL,
+ ROC_NIX_INL_SA_OP_RELOAD,
+};
+
+int __roc_api roc_nix_inl_sa_sync(struct roc_nix *roc_nix, void *sa, bool inb,
+ enum roc_nix_inl_sa_sync_op op);
+int __roc_api roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr,
+ void *sa_cptr, bool inb, uint16_t sa_len);
#endif /* _ROC_NIX_INL_H_ */
git.droids-corp.org / dpdk.git / blobdiff