common/cnxk: support ROC NPA init callback

[dpdk.git] / drivers / common / cnxk / roc_npa.c

diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index 5ba6e81..efcb758 100644 (file)
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -5,6 +5,18 @@
 #include "roc_api.h"
 #include "roc_priv.h"
 
+static roc_npa_lf_init_cb_t lf_init_cb;
+
+int
+roc_npa_lf_init_cb_register(roc_npa_lf_init_cb_t cb)
+{
+       if (lf_init_cb != NULL)
+               return -EEXIST;
+
+       lf_init_cb = cb;
+       return 0;
+}
+
 void
 roc_npa_aura_op_range_set(uint64_t aura_handle, uint64_t start_iova,
                          uint64_t end_iova)
@@ -194,7 +206,7 @@ npa_stack_dma_alloc(struct npa_lf *lf, char *name, int pool_id, size_t size)
 {
        const char *mz_name = npa_stack_memzone_name(lf, pool_id, name);
 
-       return plt_memzone_reserve_cache_align(mz_name, size);
+       return plt_memzone_reserve_aligned(mz_name, size, 0, ROC_ALIGN);
 }
 
 static inline int
@@ -278,13 +290,15 @@ npa_aura_pool_pair_alloc(struct npa_lf *lf, const uint32_t block_size,
        /* Update aura fields */
        aura->pool_addr = pool_id; /* AF will translate to associated poolctx */
        aura->ena = 1;
-       aura->shift = __builtin_clz(block_count) - 8;
+       aura->shift = plt_log2_u32(block_count);
+       aura->shift = aura->shift < 8 ? 0 : aura->shift - 8;
        aura->limit = block_count;
        aura->pool_caching = 1;
        aura->err_int_ena = BIT(NPA_AURA_ERR_INT_AURA_ADD_OVER);
        aura->err_int_ena |= BIT(NPA_AURA_ERR_INT_AURA_ADD_UNDER);
        aura->err_int_ena |= BIT(NPA_AURA_ERR_INT_AURA_FREE_UNDER);
        aura->err_int_ena |= BIT(NPA_AURA_ERR_INT_POOL_DIS);
+       aura->avg_con = ROC_NPA_AVG_CONT;
        /* Many to one reduction */
        aura->err_qint_idx = aura_id % lf->qints;
 
@@ -293,13 +307,15 @@ npa_aura_pool_pair_alloc(struct npa_lf *lf, const uint32_t block_size,
        pool->ena = 1;
        pool->buf_size = block_size / ROC_ALIGN;
        pool->stack_max_pages = stack_size;
-       pool->shift = __builtin_clz(block_count) - 8;
+       pool->shift = plt_log2_u32(block_count);
+       pool->shift = pool->shift < 8 ? 0 : pool->shift - 8;
        pool->ptr_start = 0;
        pool->ptr_end = ~0;
        pool->stack_caching = 1;
        pool->err_int_ena = BIT(NPA_POOL_ERR_INT_OVFLS);
        pool->err_int_ena |= BIT(NPA_POOL_ERR_INT_RANGE);
        pool->err_int_ena |= BIT(NPA_POOL_ERR_INT_PERR);
+       pool->avg_con = ROC_NPA_AVG_CONT;
 
        /* Many to one reduction */
        pool->err_qint_idx = pool_id % lf->qints;
@@ -690,6 +706,12 @@ npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev)
        if (__atomic_fetch_add(&idev->npa_refcnt, 1, __ATOMIC_SEQ_CST) != 0)
                return 0;
 
+       if (lf_init_cb) {
+               rc = (*lf_init_cb)(pci_dev);
+               if (rc)
+                       goto fail;
+       }
+
        rc = npa_attach(dev->mbox);
        if (rc)
                goto fail;
@@ -706,7 +728,7 @@ npa_lf_init(struct dev *dev, struct plt_pci_device *pci_dev)
 
        lf->pf_func = dev->pf_func;
        lf->npa_msixoff = npa_msixoff;
-       lf->intr_handle = &pci_dev->intr_handle;
+       lf->intr_handle = pci_dev->intr_handle;
        lf->pci_dev = pci_dev;
 
        idev->npa_pf_func = dev->pf_func;