common/cnxk: update NIX and NPA dump functions

[dpdk.git] / drivers / common / cnxk / roc_platform.h

diff --git a/drivers/common/cnxk/roc_platform.h b/drivers/common/cnxk/roc_platform.h
index a0f0179..adfb88c 100644 (file)
--- a/drivers/common/cnxk/roc_platform.h
+++ b/drivers/common/cnxk/roc_platform.h
@@ -11,6 +11,7 @@
 #include <rte_byteorder.h>
 #include <rte_common.h>
 #include <rte_cycles.h>
+#include <rte_ether.h>
 #include <rte_interrupts.h>
 #include <rte_io.h>
 #include <rte_log.h>
@@ -19,6 +20,7 @@
 #include <rte_pci.h>
 #include <rte_spinlock.h>
 #include <rte_string_fns.h>
+#include <rte_tailq.h>
 #include <rte_telemetry.h>
 
 #include "roc_bits.h"
@@ -45,6 +47,7 @@
 #define PLT_MAX                         RTE_MAX
 #define PLT_DIM                         RTE_DIM
 #define PLT_SET_USED            RTE_SET_USED
+#define PLT_SWAP                RTE_SWAP
 #define PLT_STATIC_ASSERT(s)    _Static_assert(s, #s)
 #define PLT_ALIGN               RTE_ALIGN
 #define PLT_ALIGN_MUL_CEIL      RTE_ALIGN_MUL_CEIL
@@ -53,7 +56,11 @@
 #define BITMASK_ULL             GENMASK_ULL
 #define PLT_ALIGN_CEIL          RTE_ALIGN_CEIL
 #define PLT_INIT                RTE_INIT
+#define PLT_TAILQ_FOREACH_SAFE  RTE_TAILQ_FOREACH_SAFE
 
+#ifndef PLT_ETHER_ADDR_LEN
+#define PLT_ETHER_ADDR_LEN RTE_ETHER_ADDR_LEN
+#endif
 /** Divide ceil */
 #define PLT_DIV_CEIL(x, y)                     \
        ({                                      \
@@ -69,6 +76,7 @@
 #define __roc_api          __rte_internal
 #define plt_iova_t         rte_iova_t
 
+#define plt_pci_addr               rte_pci_addr
 #define plt_pci_device             rte_pci_device
 #define plt_pci_read_config        rte_pci_read_config
 #define plt_pci_find_ext_capability rte_pci_find_ext_capability
@@ -81,6 +89,7 @@
 #define plt_cpu_to_be_64 rte_cpu_to_be_64
 #define plt_be_to_cpu_64 rte_be_to_cpu_64
 
+#define plt_aligned        __rte_aligned
 #define plt_align32pow2            rte_align32pow2
 #define plt_align32prevpow2 rte_align32prevpow2
 
@@ -106,6 +115,33 @@
 #define plt_thread_is_intr          rte_thread_is_intr
 #define plt_intr_callback_fn        rte_intr_callback_fn
 
+#define plt_intr_efd_counter_size_get  rte_intr_efd_counter_size_get
+#define plt_intr_efd_counter_size_set  rte_intr_efd_counter_size_set
+#define plt_intr_vec_list_index_get    rte_intr_vec_list_index_get
+#define plt_intr_vec_list_index_set    rte_intr_vec_list_index_set
+#define plt_intr_vec_list_alloc                rte_intr_vec_list_alloc
+#define plt_intr_vec_list_free         rte_intr_vec_list_free
+#define plt_intr_fd_set                        rte_intr_fd_set
+#define plt_intr_fd_get                        rte_intr_fd_get
+#define plt_intr_dev_fd_get            rte_intr_dev_fd_get
+#define plt_intr_dev_fd_set            rte_intr_dev_fd_set
+#define plt_intr_type_get              rte_intr_type_get
+#define plt_intr_type_set              rte_intr_type_set
+#define plt_intr_instance_alloc                rte_intr_instance_alloc
+#define plt_intr_instance_dup          rte_intr_instance_dup
+#define plt_intr_instance_free         rte_intr_instance_free
+#define plt_intr_event_list_update     rte_intr_event_list_update
+#define plt_intr_max_intr_get          rte_intr_max_intr_get
+#define plt_intr_max_intr_set          rte_intr_max_intr_set
+#define plt_intr_nb_efd_get            rte_intr_nb_efd_get
+#define plt_intr_nb_efd_set            rte_intr_nb_efd_set
+#define plt_intr_nb_intr_get           rte_intr_nb_intr_get
+#define plt_intr_nb_intr_set           rte_intr_nb_intr_set
+#define plt_intr_efds_index_get                rte_intr_efds_index_get
+#define plt_intr_efds_index_set                rte_intr_efds_index_set
+#define plt_intr_elist_index_get       rte_intr_elist_index_get
+#define plt_intr_elist_index_set       rte_intr_elist_index_set
+
 #define plt_alarm_set   rte_eal_alarm_set
 #define plt_alarm_cancel rte_eal_alarm_cancel
 
@@ -169,6 +205,7 @@ extern int cnxk_logtype_npc;
 extern int cnxk_logtype_sso;
 extern int cnxk_logtype_tim;
 extern int cnxk_logtype_tm;
+extern int cnxk_logtype_ree;
 
 #define plt_err(fmt, args...)                                                  \
        RTE_LOG(ERR, PMD, "%s():%u " fmt "\n", __func__, __LINE__, ##args)
@@ -176,6 +213,7 @@ extern int cnxk_logtype_tm;
 #define plt_warn(fmt, args...) RTE_LOG(WARNING, PMD, fmt "\n", ##args)
 #define plt_print(fmt, args...) RTE_LOG(INFO, PMD, fmt "\n", ##args)
 #define plt_dump(fmt, ...)      fprintf(stderr, fmt "\n", ##__VA_ARGS__)
+#define plt_dump_no_nl(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__)
 
 /**
  * Log debug message if given subsystem logging is enabled.
@@ -183,7 +221,7 @@ extern int cnxk_logtype_tm;
 #define plt_dbg(subsystem, fmt, args...)                                       \
        rte_log(RTE_LOG_DEBUG, cnxk_logtype_##subsystem,                       \
                "[%s] %s():%u " fmt "\n", #subsystem, __func__, __LINE__,      \
-               ##args)
+##args)
 
 #define plt_base_dbg(fmt, ...) plt_dbg(base, fmt, ##__VA_ARGS__)
 #define plt_cpt_dbg(fmt, ...)  plt_dbg(cpt, fmt, ##__VA_ARGS__)
@@ -194,6 +232,7 @@ extern int cnxk_logtype_tm;
 #define plt_sso_dbg(fmt, ...)  plt_dbg(sso, fmt, ##__VA_ARGS__)
 #define plt_tim_dbg(fmt, ...)  plt_dbg(tim, fmt, ##__VA_ARGS__)
 #define plt_tm_dbg(fmt, ...)   plt_dbg(tm, fmt, ##__VA_ARGS__)
+#define plt_ree_dbg(fmt, ...)  plt_dbg(ree, fmt, ##__VA_ARGS__)
 
 /* Datapath logs */
 #define plt_dp_err(fmt, args...)                                               \
@@ -203,18 +242,18 @@ extern int cnxk_logtype_tm;
 
 #ifdef __cplusplus
 #define CNXK_PCI_ID(subsystem_dev, dev)                                        \
-       {                                                                      \
-               RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \
-                       (subsystem_dev),                                       \
-       }
+{                                                                      \
+       RTE_CLASS_ANY_ID, PCI_VENDOR_ID_CAVIUM, (dev), RTE_PCI_ANY_ID, \
+       (subsystem_dev),                                       \
+}
 #else
 #define CNXK_PCI_ID(subsystem_dev, dev)                                        \
-       {                                                                      \
-               .class_id = RTE_CLASS_ANY_ID,                                  \
-               .vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev),         \
-               .subsystem_vendor_id = RTE_PCI_ANY_ID,                         \
-               .subsystem_device_id = (subsystem_dev),                        \
-       }
+{                                                                      \
+       .class_id = RTE_CLASS_ANY_ID,                                  \
+       .vendor_id = PCI_VENDOR_ID_CAVIUM, .device_id = (dev),         \
+       .subsystem_vendor_id = RTE_PCI_ANY_ID,                         \
+       .subsystem_device_id = (subsystem_dev),                        \
+}
 #endif
 
 __rte_internal