uint8_t taq_prcnt;
};
+struct roc_sso_hws_stats {
+ uint64_t arbitration;
+};
+
+struct roc_sso_hwgrp_stats {
+ uint64_t ws_pc;
+ uint64_t ext_pc;
+ uint64_t wa_pc;
+ uint64_t ts_pc;
+ uint64_t ds_pc;
+ uint64_t dq_pc;
+ uint64_t aw_status;
+ uint64_t page_cnt;
+};
+
struct roc_sso {
struct plt_pci_device *pci_dev;
/* Public data. */
uint8_t reserved[ROC_SSO_MEM_SZ] __plt_cache_aligned;
} __plt_cache_aligned;
+static __plt_always_inline void
+roc_sso_hws_head_wait(uintptr_t tag_op)
+{
+#ifdef RTE_ARCH_ARM64
+ uint64_t tag;
+
+ asm volatile(PLT_CPU_FEATURE_PREAMBLE
+ " ldr %[tag], [%[tag_op]] \n"
+ " tbnz %[tag], 35, done%= \n"
+ " sevl \n"
+ "rty%=: wfe \n"
+ " ldr %[tag], [%[tag_op]] \n"
+ " tbz %[tag], 35, rty%= \n"
+ "done%=: \n"
+ : [tag] "=&r"(tag)
+ : [tag_op] "r"(tag_op));
+#else
+ /* Wait for the SWTAG/SWTAG_FULL operation */
+ while (!(plt_read64(tag_op) & BIT_ULL(35)))
+ ;
+#endif
+}
+
/* SSO device initialization */
int __roc_api roc_sso_dev_init(struct roc_sso *roc_sso);
int __roc_api roc_sso_dev_fini(struct roc_sso *roc_sso);
uintptr_t __roc_api roc_sso_hwgrp_base_get(struct roc_sso *roc_sso,
uint16_t hwgrp);
+/* Debug */
+void __roc_api roc_sso_dump(struct roc_sso *roc_sso, uint8_t nb_hws,
+ uint16_t hwgrp, FILE *f);
+int __roc_api roc_sso_hwgrp_stats_get(struct roc_sso *roc_sso, uint8_t hwgrp,
+ struct roc_sso_hwgrp_stats *stats);
+int __roc_api roc_sso_hws_stats_get(struct roc_sso *roc_sso, uint8_t hws,
+ struct roc_sso_hws_stats *stats);
+
#endif /* _ROC_SSOW_H_ */