net/qede/base: update FW to 8.40.25.0

[dpdk.git] / drivers / common / cpt / cpt_mcode_defines.h

diff --git a/drivers/common/cpt/cpt_mcode_defines.h b/drivers/common/cpt/cpt_mcode_defines.h
index 60be8b3..f356e62 100644 (file)
--- a/drivers/common/cpt/cpt_mcode_defines.h
+++ b/drivers/common/cpt/cpt_mcode_defines.h
@@ -6,6 +6,7 @@
 #define _CPT_MCODE_DEFINES_H_
 
 #include <rte_byteorder.h>
+#include <rte_crypto_asym.h>
 #include <rte_memory.h>
 
 /*
@@ -20,6 +21,18 @@
 #define CPT_MAJOR_OP_KASUMI    0x38
 #define CPT_MAJOR_OP_MISC      0x01
 
+/* AE opcodes */
+#define CPT_MAJOR_OP_MODEX     0x03
+#define CPT_MINOR_OP_MODEX     0x01
+#define CPT_MINOR_OP_PKCS_ENC  0x02
+#define CPT_MINOR_OP_PKCS_ENC_CRT      0x03
+#define CPT_MINOR_OP_PKCS_DEC  0x04
+#define CPT_MINOR_OP_PKCS_DEC_CRT      0x05
+#define CPT_MINOR_OP_MODEX_CRT 0x06
+
+#define CPT_BLOCK_TYPE1 0
+#define CPT_BLOCK_TYPE2 1
+
 #define CPT_BYTE_16            16
 #define CPT_BYTE_24            24
 #define CPT_BYTE_32            32
@@ -175,6 +188,21 @@ typedef enum {
        ERR_ENODEV,
 } mc_error_code_t;
 
+/**
+ * Enumeration cpt_comp_e
+ *
+ * CPT Completion Enumeration
+ * Enumerates the values of CPT_RES_S[COMPCODE].
+ */
+typedef enum {
+       CPT_8X_COMP_E_NOTDONE    = (0x00),
+       CPT_8X_COMP_E_GOOD       = (0x01),
+       CPT_8X_COMP_E_FAULT      = (0x02),
+       CPT_8X_COMP_E_SWERR      = (0x03),
+       CPT_8X_COMP_E_HWERR      = (0x04),
+       CPT_8X_COMP_E_LAST_ENTRY = (0xFF)
+} cpt_comp_e_t;
+
 typedef struct sglist_comp {
        union {
                uint64_t len;
@@ -198,6 +226,8 @@ struct cpt_sess_misc {
        uint16_t is_null:1;
        /** Flag for GMAC */
        uint16_t is_gmac:1;
+       /** Engine group */
+       uint16_t egrp:3;
        /** AAD length */
        uint16_t aad_length;
        /** MAC len in bytes */
@@ -288,8 +318,8 @@ struct cpt_ctx {
        uint64_t hmac           :1;
        uint64_t zsk_flags      :3;
        uint64_t k_ecb          :1;
-       uint64_t snow3g         :1;
-       uint64_t rsvd           :22;
+       uint64_t snow3g         :2;
+       uint64_t rsvd           :21;
        /* Below fields are accessed by hardware */
        union {
                mc_fc_context_t fctx;
@@ -299,6 +329,14 @@ struct cpt_ctx {
        uint8_t  auth_key[64];
 };
 
+struct cpt_asym_sess_misc {
+       enum rte_crypto_asym_xform_type xfrm_type;
+       union {
+               struct rte_crypto_rsa_xform rsa_ctx;
+               struct rte_crypto_modex_xform mod_ctx;
+       };
+};
+
 /* Buffer pointer */
 typedef struct buf_ptr {
        void *vaddr;
@@ -342,6 +380,14 @@ typedef struct fc_params {
 
 } fc_params_t;
 
+/*
+ * Parameters for asymmetric operations
+ */
+struct asym_op_params {
+       struct cpt_request_info *req;
+       phys_addr_t meta_buf;
+};
+
 /*
  * Parameters for digest
  * generate requests
@@ -368,4 +414,16 @@ typedef mc_hash_type_t auth_type_t;
 #define SESS_PRIV(__sess) \
        (void *)((uint8_t *)__sess + sizeof(struct cpt_sess_misc))
 
+/*
+ * Get the session size
+ *
+ * @return
+ *   - session size
+ */
+static __rte_always_inline unsigned int
+cpt_get_session_size(void)
+{
+       unsigned int ctx_len = sizeof(struct cpt_ctx);
+       return (sizeof(struct cpt_sess_misc) + RTE_ALIGN_CEIL(ctx_len, 8));
+}
 #endif /* _CPT_MCODE_DEFINES_H_ */