u8 used_addr[0x40];
u8 available_addr[0x40];
u8 virtio_q_mkey[0x20];
- u8 reserved_at_160[0x20];
+ u8 reserved_at_160[0x18];
+ u8 error_type[0x8];
u8 umem_1_id[0x20];
u8 umem_1_size[0x20];
u8 umem_1_offset[0x40];
u8 vhost_log_page[0x5];
u8 reserved_at_90[0xc];
u8 state[0x4];
- u8 error_type[0x8];
+ u8 reserved_at_a0[0x8];
u8 tisn_or_qpn[0x18];
u8 dirty_bitmap_mkey[0x20];
u8 dirty_bitmap_size[0x20];
struct mlx5_ifc_virtio_net_q_bits virtq;
};
+enum {
+ MLX5_EVENT_TYPE_OBJECT_CHANGE = 0x27,
+};
+
enum {
MLX5_QP_ST_RC = 0x0,
};