#define otx2_dev_is_lbk(dev) ((dev->hwcap & OTX2_HWCAP_F_VF) && \
(dev->tx_chan_base < 0x700))
#define otx2_dev_revid(dev) (dev->hwcap & 0xFF)
+#define otx2_dev_is_sdp(dev) (dev->sdp_link)
+
+#define otx2_dev_is_vf_or_sdp(dev) \
+ (otx2_dev_is_vf(dev) || otx2_dev_is_sdp(dev))
#define otx2_dev_is_A0(dev) \
((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) && \
(RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
+#define otx2_dev_is_96xx_Cx(dev) \
+ ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x2) && \
+ (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
+
+#define otx2_dev_is_96xx_C0(dev) \
+ ((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x2) && \
+ (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0) && \
+ (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
+
struct otx2_dev;
/* Link status callback */
OTX2_DEV;
};
+__rte_internal
int otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev);
/* Common dev init and fini routines */
return rc;
}
- if (pci_dev->id.subsystem_device_id == PCI_SUBSYS_DEVID_96XX_95XX)
- dev->hwcap = rev_id;
- else
- dev->hwcap = 0;
-
+ dev->hwcap = rev_id;
return otx2_dev_priv_init(pci_dev, otx2_dev);
}
+__rte_internal
void otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev);
+__rte_internal
int otx2_dev_active_vfs(void *otx2_dev);
#define RVU_PFVF_PF_SHIFT 10