common/sfc_efx/base: separate target EvQ and IRQ config

[dpdk.git] / drivers / common / sfc_efx / base / ef10_filter.c

diff --git a/drivers/common/sfc_efx/base/ef10_filter.c b/drivers/common/sfc_efx/base/ef10_filter.c
index 12c84a5..ac6006c 100644 (file)
--- a/drivers/common/sfc_efx/base/ef10_filter.c
+++ b/drivers/common/sfc_efx/base/ef10_filter.c
@@ -1,13 +1,13 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
  * Copyright(c) 2007-2019 Solarflare Communications Inc.
  */
 
 #include "efx.h"
 #include "efx_impl.h"
 
-#if EFX_OPTS_EF10()
+#if EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10()
 
 #if EFSYS_OPT_FILTER
 
@@ -94,7 +94,7 @@ ef10_filter_init(
        efx_rc_t rc;
        ef10_filter_table_t *eftp;
 
-       EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
+       EFSYS_ASSERT(EFX_FAMILY_IS_EF100(enp) || EFX_FAMILY_IS_EF10(enp));
 
 #define        MATCH_MASK(match) (EFX_MASK32(match) << EFX_LOW_BIT(match))
        EFX_STATIC_ASSERT(EFX_FILTER_MATCH_REM_HOST ==
@@ -152,7 +152,7 @@ fail1:
 ef10_filter_fini(
        __in            efx_nic_t *enp)
 {
-       EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
+       EFSYS_ASSERT(EFX_FAMILY_IS_EF100(enp) || EFX_FAMILY_IS_EF10(enp));
 
        if (enp->en_filter.ef_ef10_filter_table != NULL) {
                EFSYS_KMEM_FREE(enp->en_esip, sizeof (ef10_filter_table_t),
@@ -540,7 +540,7 @@ ef10_filter_restore(
        efsys_lock_state_t state;
        efx_rc_t rc;
 
-       EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
+       EFSYS_ASSERT(EFX_FAMILY_IS_EF100(enp) || EFX_FAMILY_IS_EF10(enp));
 
        for (tbl_id = 0; tbl_id < EFX_EF10_FILTER_TBL_ROWS; tbl_id++) {
 
@@ -839,7 +839,7 @@ ef10_filter_add_internal(
        efsys_lock_state_t state;
        boolean_t locked = B_FALSE;
 
-       EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
+       EFSYS_ASSERT(EFX_FAMILY_IS_EF100(enp) || EFX_FAMILY_IS_EF10(enp));
 
        EFSYS_ASSERT(spec->efs_overridden_spec == NULL);
 
@@ -1149,7 +1149,7 @@ ef10_filter_delete(
        efsys_lock_state_t state;
        boolean_t locked = B_FALSE;
 
-       EFSYS_ASSERT(EFX_FAMILY_IS_EF10(enp));
+       EFSYS_ASSERT(EFX_FAMILY_IS_EF100(enp) || EFX_FAMILY_IS_EF10(enp));
 
        hash = ef10_filter_hash(spec);
 
@@ -1225,20 +1225,25 @@ efx_mcdi_get_parser_disp_info(
                goto fail1;
        }
 
+       if (req.emr_out_length_used < MC_CMD_GET_PARSER_DISP_INFO_OUT_LENMIN) {
+               rc = EMSGSIZE;
+               goto fail2;
+       }
+
        matches_count = MCDI_OUT_DWORD(req,
            GET_PARSER_DISP_INFO_OUT_NUM_SUPPORTED_MATCHES);
 
        if (req.emr_out_length_used <
            MC_CMD_GET_PARSER_DISP_INFO_OUT_LEN(matches_count)) {
                rc = EMSGSIZE;
-               goto fail2;
+               goto fail3;
        }
 
        *list_lengthp = matches_count;
 
        if (buffer_length < matches_count) {
                rc = ENOSPC;
-               goto fail3;
+               goto fail4;
        }
 
        /*
@@ -1258,6 +1263,8 @@ efx_mcdi_get_parser_disp_info(
 
        return (0);
 
+fail4:
+       EFSYS_PROBE(fail4);
 fail3:
        EFSYS_PROBE(fail3);
 fail2:
@@ -1328,9 +1335,15 @@ ef10_filter_supported_filters(
                rc = efx_mcdi_get_parser_disp_info(enp, &buffer[next_buf_idx],
                    next_buf_length, B_TRUE, &mcdi_encap_list_length);
                if (rc != 0) {
-                       if (rc == ENOSPC)
+                       if (rc == ENOSPC) {
                                no_space = B_TRUE;
-                       else
+                       } else if (rc == EINVAL) {
+                               /*
+                                * Do not fail if the MCDI do not recognize the
+                                * query for encapsulated packet filters.
+                                */
+                               mcdi_encap_list_length = 0;
+                       } else
                                goto fail2;
                } else {
                        for (i = next_buf_idx;
@@ -2138,4 +2151,4 @@ ef10_filter_default_rxq_clear(
 
 #endif /* EFSYS_OPT_FILTER */
 
-#endif /* EFX_OPTS_EF10() */
+#endif /* EFSYS_OPT_RIVERHEAD || EFX_OPTS_EF10() */