/* SPDX-License-Identifier: BSD-3-Clause
*
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
* Copyright(c) 2007-2019 Solarflare Communications Inc.
*/
__in uint32_t id,
__in uint32_t us,
__in uint32_t flags,
+ __in uint32_t irq,
__in efx_evq_t *eep);
static void
__checkReturn size_t
efx_evq_size(
__in const efx_nic_t *enp,
- __in unsigned int ndescs)
+ __in unsigned int ndescs,
+ __in uint32_t flags)
{
const efx_nic_cfg_t *encp = efx_nic_cfg_get(enp);
+ size_t desc_size;
- return (ndescs * encp->enc_ev_desc_size);
+ desc_size = encp->enc_ev_desc_size;
+
+#if EFSYS_OPT_EV_EXTENDED_WIDTH
+ if (flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH)
+ desc_size = encp->enc_ev_ew_desc_size;
+#else
+ EFSYS_ASSERT((flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) == 0);
+#endif
+
+ return (ndescs * desc_size);
}
__checkReturn unsigned int
efx_evq_nbufs(
__in const efx_nic_t *enp,
- __in unsigned int ndescs)
+ __in unsigned int ndescs,
+ __in uint32_t flags)
{
- return (EFX_DIV_ROUND_UP(efx_evq_size(enp, ndescs), EFX_BUF_SIZE));
+ size_t size;
+
+ size = efx_evq_size(enp, ndescs, flags);
+
+ return (EFX_DIV_ROUND_UP(size, EFX_BUF_SIZE));
}
void
__checkReturn efx_rc_t
-efx_ev_qcreate(
+efx_ev_qcreate_irq(
__in efx_nic_t *enp,
__in unsigned int index,
__in efsys_mem_t *esmp,
__in uint32_t id,
__in uint32_t us,
__in uint32_t flags,
+ __in uint32_t irq,
__deref_out efx_evq_t **eepp)
{
const efx_ev_ops_t *eevop = enp->en_eevop;
goto fail4;
}
+ if ((flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) &&
+ (encp->enc_ev_ew_desc_size == 0)) {
+ /* Extended width event descriptors are not supported. */
+ rc = EINVAL;
+ goto fail5;
+ }
+
EFSYS_ASSERT(ISP2(encp->enc_evq_max_nevs));
EFSYS_ASSERT(ISP2(encp->enc_evq_min_nevs));
ndescs < encp->enc_evq_min_nevs ||
ndescs > encp->enc_evq_max_nevs) {
rc = EINVAL;
- goto fail5;
+ goto fail6;
+ }
+
+ if (EFSYS_MEM_SIZE(esmp) < (ndescs * encp->enc_ev_desc_size)) {
+ /* Buffer too small for event queue descriptors. */
+ rc = EINVAL;
+ goto fail7;
}
/* Allocate an EVQ object */
EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
if (eep == NULL) {
rc = ENOMEM;
- goto fail6;
+ goto fail8;
}
eep->ee_magic = EFX_EVQ_MAGIC;
*eepp = eep;
if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
- eep)) != 0)
- goto fail7;
+ irq, eep)) != 0)
+ goto fail9;
return (0);
-fail7:
- EFSYS_PROBE(fail7);
+fail9:
+ EFSYS_PROBE(fail9);
*eepp = NULL;
enp->en_ev_qcount--;
EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
+fail8:
+ EFSYS_PROBE(fail8);
+fail7:
+ EFSYS_PROBE(fail7);
fail6:
EFSYS_PROBE(fail6);
fail5:
return (rc);
}
+ __checkReturn efx_rc_t
+efx_ev_qcreate(
+ __in efx_nic_t *enp,
+ __in unsigned int index,
+ __in efsys_mem_t *esmp,
+ __in size_t ndescs,
+ __in uint32_t id,
+ __in uint32_t us,
+ __in uint32_t flags,
+ __deref_out efx_evq_t **eepp)
+{
+ uint32_t irq = index;
+
+ return (efx_ev_qcreate_irq(enp, index, esmp, ndescs, id, us, flags,
+ irq, eepp));
+}
+
void
efx_ev_qdestroy(
__in efx_evq_t *eep)
__in uint32_t id,
__in uint32_t us,
__in uint32_t flags,
+ __in uint32_t irq,
__in efx_evq_t *eep)
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
_NOTE(ARGUNUSED(esmp))
+ EFSYS_ASSERT((flags & EFX_EVQ_FLAGS_EXTENDED_WIDTH) == 0);
+
+ if (irq != index) {
+ rc = EINVAL;
+ goto fail1;
+ }
+
#if EFSYS_OPT_RX_SCALE
if (enp->en_intr.ei_type == EFX_INTR_LINE &&
index >= EFX_MAXRSS_LEGACY) {
rc = EINVAL;
- goto fail1;
+ goto fail2;
}
#endif
for (size = 0;
break;
if (id + (1 << size) >= encp->enc_buftbl_limit) {
rc = EINVAL;
- goto fail2;
+ goto fail3;
}
/* Set up the handler table */
return (0);
+fail3:
+ EFSYS_PROBE(fail3);
+#if EFSYS_OPT_RX_SCALE
fail2:
EFSYS_PROBE(fail2);
-#if EFSYS_OPT_RX_SCALE
-fail1:
#endif
+fail1:
EFSYS_PROBE1(fail1, efx_rc_t, rc);
return (rc);