common/sfc_efx/base: separate target EvQ and IRQ config

[dpdk.git] / drivers / common / sfc_efx / base / efx_filter.c

diff --git a/drivers/common/sfc_efx/base/efx_filter.c b/drivers/common/sfc_efx/base/efx_filter.c
index 3310b73..83c37ff 100644 (file)
--- a/drivers/common/sfc_efx/base/efx_filter.c
+++ b/drivers/common/sfc_efx/base/efx_filter.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright(c) 2019-2020 Xilinx, Inc.
+ * Copyright(c) 2019-2021 Xilinx, Inc.
  * Copyright(c) 2007-2019 Solarflare Communications Inc.
  */
 
@@ -68,6 +68,18 @@ static const efx_filter_ops_t        __efx_filter_ef10_ops = {
 };
 #endif /* EFX_OPTS_EF10() */
 
+#if EFSYS_OPT_RIVERHEAD
+static const efx_filter_ops_t  __efx_filter_rhead_ops = {
+       ef10_filter_init,               /* efo_init */
+       ef10_filter_fini,               /* efo_fini */
+       ef10_filter_restore,            /* efo_restore */
+       ef10_filter_add,                /* efo_add */
+       ef10_filter_delete,             /* efo_delete */
+       ef10_filter_supported_filters,  /* efo_supported_filters */
+       ef10_filter_reconfigure,        /* efo_reconfigure */
+};
+#endif /* EFSYS_OPT_RIVERHEAD */
+
        __checkReturn   efx_rc_t
 efx_filter_insert(
        __in            efx_nic_t *enp,
@@ -180,6 +192,12 @@ efx_filter_init(
                break;
 #endif /* EFSYS_OPT_MEDFORD2 */
 
+#if EFSYS_OPT_RIVERHEAD
+       case EFX_FAMILY_RIVERHEAD:
+               efop = &__efx_filter_rhead_ops;
+               break;
+#endif /* EFSYS_OPT_RIVERHEAD */
+
        default:
                EFSYS_ASSERT(0);
                rc = ENOTSUP;