void (*eevo_fini)(efx_nic_t *);
efx_rc_t (*eevo_qcreate)(efx_nic_t *, unsigned int,
efsys_mem_t *, size_t, uint32_t,
- uint32_t, uint32_t, efx_evq_t *);
+ uint32_t, uint32_t, uint32_t,
+ efx_evq_t *);
void (*eevo_qdestroy)(efx_evq_t *);
efx_rc_t (*eevo_qprime)(efx_evq_t *, unsigned int);
void (*eevo_qpost)(efx_evq_t *, uint16_t);
/** Outer rule match field capabilities. */
efx_mae_field_cap_t *em_outer_rule_field_caps;
size_t em_outer_rule_field_caps_size;
+ uint32_t em_max_ncounters;
} efx_mae_t;
#endif /* EFSYS_OPT_MAE */
__in efsys_mem_t *esmp,
__in size_t nevs,
__in uint32_t irq,
+ __in uint32_t target_evq,
__in uint32_t us,
__in uint32_t flags,
__in boolean_t low_latency);
efx_mae_rule_type_t emms_type;
uint32_t emms_prio;
union emms_mask_value_pairs {
- uint8_t action[MAE_FIELD_MASK_VALUE_PAIRS_LEN];
+ uint8_t action[
+ MAE_FIELD_MASK_VALUE_PAIRS_V2_LEN];
uint8_t outer[MAE_ENC_FIELD_PAIRS_LEN];
} emms_mask_value_pairs;
};
EFX_MAE_ACTION_DECAP,
EFX_MAE_ACTION_VLAN_POP,
EFX_MAE_ACTION_VLAN_PUSH,
+ EFX_MAE_ACTION_COUNT,
EFX_MAE_ACTION_ENCAP,
/*
typedef struct efx_mae_actions_rsrc_s {
efx_mae_eh_id_t emar_eh_id;
+ efx_counter_t emar_counter_id;
} efx_mae_actions_rsrc_t;
struct efx_mae_actions_s {
unsigned int ema_n_vlan_tags_to_push;
efx_mae_action_vlan_push_t ema_vlan_push_descs[
EFX_MAE_VLAN_PUSH_MAX_NTAGS];
+ unsigned int ema_n_count_actions;
uint32_t ema_mark_value;
efx_mport_sel_t ema_deliver_mport;