event/octeontx2: add Tx adapter
[dpdk.git] / drivers / compress / isal / isal_compress_pmd_ops.c
index dcf79bf..77ac6fc 100644 (file)
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(c) 2018 Intel Corporation
  */
+#include <isa-l.h>
 
 #include <rte_common.h>
 #include <rte_compressdev_pmd.h>
@@ -9,6 +10,22 @@
 #include "isal_compress_pmd_private.h"
 
 static const struct rte_compressdev_capabilities isal_pmd_capabilities[] = {
+       {
+               .algo = RTE_COMP_ALGO_DEFLATE,
+               .comp_feature_flags =   RTE_COMP_FF_OOP_SGL_IN_SGL_OUT |
+                                       RTE_COMP_FF_OOP_SGL_IN_LB_OUT |
+                                       RTE_COMP_FF_OOP_LB_IN_SGL_OUT |
+                                       RTE_COMP_FF_SHAREABLE_PRIV_XFORM |
+                                       RTE_COMP_FF_HUFFMAN_FIXED |
+                                       RTE_COMP_FF_HUFFMAN_DYNAMIC |
+                                       RTE_COMP_FF_CRC32_CHECKSUM |
+                                       RTE_COMP_FF_ADLER32_CHECKSUM,
+               .window_size = {
+                       .min = 15,
+                       .max = 15,
+                       .increment = 0
+               },
+       },
        RTE_COMP_END_OF_CAPABILITIES_LIST()
 };
 
@@ -118,10 +135,18 @@ isal_comp_pmd_info_get(struct rte_compressdev *dev __rte_unused,
 {
        if (dev_info != NULL) {
                dev_info->capabilities = isal_pmd_capabilities;
-               dev_info->feature_flags = RTE_COMPDEV_FF_CPU_AVX512 |
-                               RTE_COMPDEV_FF_CPU_AVX2 |
-                               RTE_COMPDEV_FF_CPU_AVX |
-                               RTE_COMPDEV_FF_CPU_SSE;
+
+               /* Check CPU for supported vector instruction and set
+                * feature_flags
+                */
+               if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F))
+                       dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX512;
+               else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
+                       dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX2;
+               else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX))
+                       dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_AVX;
+               else
+                       dev_info->feature_flags |= RTE_COMPDEV_FF_CPU_SSE;
        }
 }
 
@@ -146,8 +171,14 @@ isal_comp_pmd_qp_release(struct rte_compressdev *dev, uint16_t qp_id)
        if (qp == NULL)
                return -EINVAL;
 
-       if (dev->data->queue_pairs[qp_id] != NULL)
-               rte_free(dev->data->queue_pairs[qp_id]);
+       if (qp->stream)
+               rte_free(qp->stream->level_buf);
+
+       rte_free(qp->state);
+       rte_ring_free(qp->processed_pkts);
+       rte_free(qp->stream);
+       rte_free(qp);
+       dev->data->queue_pairs[qp_id] = NULL;
 
        return 0;
 }
@@ -214,6 +245,21 @@ isal_comp_pmd_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,
                return (-ENOMEM);
        }
 
+       /* Initialize memory for compression stream structure */
+       qp->stream = rte_zmalloc_socket("Isa-l compression stream ",
+                       sizeof(struct isal_zstream),  RTE_CACHE_LINE_SIZE,
+                       socket_id);
+
+       /* Initialize memory for compression level buffer */
+       qp->stream->level_buf = rte_zmalloc_socket("Isa-l compression lev_buf",
+                       ISAL_DEF_LVL3_DEFAULT, RTE_CACHE_LINE_SIZE,
+                       socket_id);
+
+       /* Initialize memory for decompression state structure */
+       qp->state = rte_zmalloc_socket("Isa-l decompression state",
+                       sizeof(struct inflate_state), RTE_CACHE_LINE_SIZE,
+                       socket_id);
+
        qp->id = qp_id;
        dev->data->queue_pairs[qp_id] = qp;